diff options
| author | Simon Glass <sjg@chromium.org> | 2023-01-07 14:07:18 -0700 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2023-01-18 14:55:39 -0700 |
| commit | e0c0efff2a02bf153d6afced3a57107790159ae2 (patch) | |
| tree | 20a0e5ccada4070f2c29367300a4c72abb9a59f1 | |
| parent | 4170dd9ec023b3b4b7375755c4dbb484a4d00443 (diff) | |
rockchip: Support building the all output files in binman
Add the required binman images to replace the Makefile rules which are
currently used. This includes subsuming:
- tpl/u-boot-tpl-rockchip.bin if TPL is enabled
- idbloader.img if either or both of SPL and TPL are enabled
- u-boot.itb if SPL_FIT is enabled
- u-boot-rockchip.bin if SPL is used, either using u-boot.itb when
SPL_FIT is enabled or u-boot.img when it isn't
Note that the intermediate files are dropped with binman, since it
producing everything in one pass. This means that
tpl/u-boot-tpl-rockchip.bin is not created, for example.
Note that for some 32-bit rk3288 boards, rockchip-optee.dtsi is included.
Signed-off-by: Simon Glass <sjg@chromium.org>
| -rw-r--r-- | arch/arm/dts/px30-ringneck-haikou-u-boot.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi | 4 | ||||
| -rw-r--r-- | arch/arm/dts/rockchip-u-boot.dtsi | 78 |
3 files changed, 75 insertions, 9 deletions
diff --git a/arch/arm/dts/px30-ringneck-haikou-u-boot.dtsi b/arch/arm/dts/px30-ringneck-haikou-u-boot.dtsi index e8a34c7c1eb..1325e0cb055 100644 --- a/arch/arm/dts/px30-ringneck-haikou-u-boot.dtsi +++ b/arch/arm/dts/px30-ringneck-haikou-u-boot.dtsi @@ -17,7 +17,7 @@ &binman { simple-bin { - blob { + fit { offset = <((CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR - 64) * 512)>; }; }; diff --git a/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi b/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi index d2349ae90e2..088861dbf6d 100644 --- a/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi +++ b/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi @@ -46,14 +46,14 @@ &binman { simple-bin { - blob { + fit { offset = <((CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR - 64) * 512)>; }; }; #ifdef CONFIG_ROCKCHIP_SPI_IMAGE simple-bin-spi { - blob { + fit { /* same as u-boot,spl-payload-offset */ offset = <0x80000>; }; diff --git a/arch/arm/dts/rockchip-u-boot.dtsi b/arch/arm/dts/rockchip-u-boot.dtsi index fa094b00392..234fc5df433 100644 --- a/arch/arm/dts/rockchip-u-boot.dtsi +++ b/arch/arm/dts/rockchip-u-boot.dtsi @@ -30,14 +30,79 @@ }; }; -#ifdef CONFIG_ARM64 - blob { +#if defined(CONFIG_SPL_FIT) && defined(CONFIG_ARM64) + fit: fit { + description = "FIT image for U-Boot with bl31 (TF-A)"; + #address-cells = <1>; + fit,fdt-list = "of-list"; filename = "u-boot.itb"; + fit,external-offset = <CONFIG_FIT_EXTERNAL_OFFSET>; + offset = <CONFIG_SPL_PAD_TO>; + images { + u-boot { + description = "U-Boot (64-bit)"; + type = "standalone"; + os = "U-Boot"; + arch = "arm64"; + compression = "none"; + load = <CONFIG_TEXT_BASE>; + entry = <CONFIG_TEXT_BASE>; + u-boot-nodtb { + }; + }; + + @atf-SEQ { + fit,operation = "split-elf"; + description = "ARM Trusted Firmware"; + type = "firmware"; + arch = "arm64"; + os = "arm-trusted-firmware"; + compression = "none"; + fit,load; + fit,entry; + fit,data; + + atf-bl31 { + }; + }; + @tee-SEQ { + fit,operation = "split-elf"; + description = "TEE"; + type = "tee"; + arch = "arm64"; + os = "tee"; + compression = "none"; + fit,load; + fit,entry; + fit,data; + + tee-os { + optional; + }; + }; + + @fdt-SEQ { + description = "fdt-NAME"; + compression = "none"; + type = "flat_dt"; + }; + }; + + configurations { + default = "@config-DEFAULT-SEQ"; + @config-SEQ { + description = "NAME.dtb"; + fdt = "fdt-SEQ"; + firmware = "u-boot"; + fit,loadables; + }; + }; + }; #else u-boot-img { -#endif offset = <CONFIG_SPL_PAD_TO>; }; +#endif }; #ifdef CONFIG_ROCKCHIP_SPI_IMAGE @@ -59,7 +124,8 @@ }; #ifdef CONFIG_ARM64 - blob { + fit { + type = "blob"; filename = "u-boot.itb"; #else u-boot-img { @@ -68,6 +134,6 @@ offset = <CONFIG_SYS_SPI_U_BOOT_OFFS>; }; }; -#endif +#endif /* CONFIG_ROCKCHIP_SPI_IMAGE */ }; -#endif +#endif /* CONFIG_SPL */ |