diff options
| author | Jonas Karlman <jonas@kwiboo.se> | 2025-11-16 01:45:29 +0000 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2025-11-24 07:40:08 -0600 |
| commit | e8c10f9d2446d66f56fc3621752c995dd6e99192 (patch) | |
| tree | b24a59a739bbc4464068828290a171149c8e472e | |
| parent | 9eeed950445aa1e5f637f2e350986a0c45b0317c (diff) | |
rockchip: rk3588: Map SCMI shared memory area as non-cacheable
The SCMI shared memory area is no longer automatically marked as
non-cacheable after the commit a5a0134570c8 ("firmware: scmi: Drop
mmu_set_region_dcache_behaviour() misuse").
This change in behavior cause Rockchip RK3588 boards to fail boot with:
SoC: RK3588
DRAM: 8 GiB
scmi-over-smccc scmi: Channel unexpectedly busy
scmi_base_drv scmi-base.0: getting protocol version failed
scmi-over-smccc scmi: failed to probe base protocol
initcall_run_r(): initcall initr_dm() failed
### ERROR ### Please RESET the board ###
Update the memory mapping on RK3588 to mark the SCMI shared memory area
as non-cacheable to fix the SCMI shared memory based transport issue
that prevented RK3588 boards from booting.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| -rw-r--r-- | arch/arm/mach-rockchip/rk3588/rk3588.c | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/arch/arm/mach-rockchip/rk3588/rk3588.c b/arch/arm/mach-rockchip/rk3588/rk3588.c index c01a4002089..55d2caab4fe 100644 --- a/arch/arm/mach-rockchip/rk3588/rk3588.c +++ b/arch/arm/mach-rockchip/rk3588/rk3588.c @@ -63,7 +63,20 @@ static struct mm_region rk3588_mem_map[] = { { .virt = 0x0UL, .phys = 0x0UL, - .size = 0xf0000000UL, + .size = 0x10f000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE + }, { + /* SCMI shared memory area must be mapped as non-cacheable. */ + .virt = 0x10f000UL, + .phys = 0x10f000UL, + .size = 0x1000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) | + PTE_BLOCK_INNER_SHARE + }, { + .virt = 0x110000UL, + .phys = 0x110000UL, + .size = 0xefef0000UL, .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE }, { |