diff options
| author | Ryan Wanner <Ryan.Wanner@microchip.com> | 2025-07-07 17:01:27 +0530 |
|---|---|---|
| committer | Eugen Hristev <eugen.hristev@linaro.org> | 2025-07-25 11:54:43 +0300 |
| commit | eff0e49d1c6c75c92665c285216cf9bd785e5ac1 (patch) | |
| tree | f5aa1c6b69f5a033b81d75114ec1845044c160dc | |
| parent | 3532f1f5edfc97c9dcea723cdeb732eda44bc669 (diff) | |
clk: at91: Update MAX PLL and master clk ID
Update the MAX PLL and master CLK ID to support sama7d65
SoC family.
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
| -rw-r--r-- | drivers/clk/at91/clk-master.c | 2 | ||||
| -rw-r--r-- | drivers/clk/at91/clk-sam9x60-pll.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clk/at91/clk-master.c b/drivers/clk/at91/clk-master.c index d28775d64d3..cdc5271fa83 100644 --- a/drivers/clk/at91/clk-master.c +++ b/drivers/clk/at91/clk-master.c @@ -37,7 +37,7 @@ #define PMC_MCR_ID(x) ((x) & PMC_MCR_ID_MSK) -#define MASTER_MAX_ID 4 +#define MASTER_MAX_ID 10 struct clk_master { void __iomem *base; diff --git a/drivers/clk/at91/clk-sam9x60-pll.c b/drivers/clk/at91/clk-sam9x60-pll.c index df8172bccac..65be2775ac3 100644 --- a/drivers/clk/at91/clk-sam9x60-pll.c +++ b/drivers/clk/at91/clk-sam9x60-pll.c @@ -32,7 +32,7 @@ #define UPLL_DIV 2 #define PLL_MUL_MAX (FIELD_GET(PMC_PLL_CTRL1_MUL_MSK, UINT_MAX) + 1) -#define PLL_MAX_ID 7 +#define PLL_MAX_ID 8 struct sam9x60_pll { void __iomem *base; |