diff options
| author | Siddharth Vadapalli <s-vadapalli@ti.com> | 2024-10-14 11:09:24 +0530 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2024-10-21 17:51:51 -0600 |
| commit | f3e1aaddb45233eb1c0f60f1e0d3ad4adb9e391c (patch) | |
| tree | a8cc9b978764fd6fc707fe93631ec2e57d06fe13 | |
| parent | 59ad54800986668c73e3744bf9425c6946bf73bc (diff) | |
configs: j7200_evm_a72_defconfig: Enable configs for PCI support
TI's J7200 SoC has a single instance of PCIe Controller namely PCIe1 which
is a Cadence PCIe Controller. To support PCIe functionality with the PCIe1
instance of PCIe, enable the corresponding configs.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
| -rw-r--r-- | configs/j7200_evm_a72_defconfig | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/configs/j7200_evm_a72_defconfig b/configs/j7200_evm_a72_defconfig index 2fbfda5cf8f..12745a9adc3 100644 --- a/configs/j7200_evm_a72_defconfig +++ b/configs/j7200_evm_a72_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y # CONFIG_PSCI_RESET is not set +CONFIG_PCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 @@ -71,6 +72,7 @@ CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_MTD=y +CONFIG_CMD_PCI=y CONFIG_CMD_REMOTEPROC=y CONFIG_CMD_UFS=y CONFIG_CMD_USB=y @@ -153,6 +155,9 @@ CONFIG_MUX_MMIO=y CONFIG_PHY_TI_DP83869=y CONFIG_PHY_FIXED=y CONFIG_TI_AM65_CPSW_NUSS=y +CONFIG_NVME_PCI=y +CONFIG_PCI_CONFIG_HOST_BRIDGE=y +CONFIG_PCIE_CDNS_TI=y CONFIG_PHY=y CONFIG_SPL_PHY=y CONFIG_PHY_CADENCE_TORRENT=y |