diff options
| author | Marek Vasut <marex@denx.de> | 2025-03-09 03:05:54 +0100 |
|---|---|---|
| committer | Patrice Chotard <patrice.chotard@foss.st.com> | 2025-03-10 09:39:30 +0100 |
| commit | f5ee0f2bf7b008dc92315c10239e8d537877c0de (patch) | |
| tree | 74fbe54b92d33fa3f87b20c76f765b8bd7258f17 | |
| parent | dc0ee458f1afae4cb5c8a7b2c875bb24ffdf71ca (diff) | |
ARM: stm32mp: Fix dram_bank_mmu_setup() for ram_top=0
On STM32MP15xx with 1 GiB of DRAM, the gd->ram_top becomes 0,
because DRAM base 0xc0000000 + DRAM size 0x40000000 leads to
gd->ram_top overflow which resets it to 0. Handle this special
case simply by checking for gd->ram_top being zero, and if it
is, assume there is no addr >= gd->ram_top .
This fixes boot hang on STM32MP15xx with 1 GiB of DRAM.
Fixes: 25fb58e88aba ("ARM: stm32mp: Fix dram_bank_mmu_setup() for LMB located above ram_top")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| -rw-r--r-- | arch/arm/mach-stm32mp/stm32mp1/cpu.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-stm32mp/stm32mp1/cpu.c b/arch/arm/mach-stm32mp/stm32mp1/cpu.c index cb1b84c9af9..d5eaf6711b6 100644 --- a/arch/arm/mach-stm32mp/stm32mp1/cpu.c +++ b/arch/arm/mach-stm32mp/stm32mp1/cpu.c @@ -82,7 +82,7 @@ void dram_bank_mmu_setup(int bank) option = DCACHE_DEFAULT_OPTION; if (use_lmb && (lmb_is_reserved_flags(i << MMU_SECTION_SHIFT, LMB_NOMAP) || - addr >= gd->ram_top) + (gd->ram_top && addr >= gd->ram_top)) ) option = 0; /* INVALID ENTRY in TLB */ set_section_dcache(i, option); |