diff options
| author | Christophe Kerello <christophe.kerello@foss.st.com> | 2023-03-30 11:26:17 +0200 |
|---|---|---|
| committer | Patrice Chotard <patrice.chotard@foss.st.com> | 2023-04-19 09:59:36 +0200 |
| commit | fa998c8aea43171959ad3d5dbcac37ca2441e8f9 (patch) | |
| tree | 7f97eb3e145797e30812af4579196daaa86c8be2 | |
| parent | d6fe59b781e1b0e8f3e5874fe2e96376a01836ae (diff) | |
ARM: dts: stm32: add FMC support on STM32MP13x SoC family
Add FMC support on STM32MP13x SoC family.
Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| -rw-r--r-- | arch/arm/dts/stm32mp131.dtsi | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/arch/arm/dts/stm32mp131.dtsi b/arch/arm/dts/stm32mp131.dtsi index 5a064d5566e..6d82bf646d2 100644 --- a/arch/arm/dts/stm32mp131.dtsi +++ b/arch/arm/dts/stm32mp131.dtsi @@ -191,6 +191,39 @@ dma-requests = <48>; }; + fmc: memory-controller@58002000 { + compatible = "st,stm32mp1-fmc2-ebi"; + reg = <0x58002000 0x1000>; + ranges = <0 0 0x60000000 0x04000000>, /* EBI CS 1 */ + <1 0 0x64000000 0x04000000>, /* EBI CS 2 */ + <2 0 0x68000000 0x04000000>, /* EBI CS 3 */ + <3 0 0x6c000000 0x04000000>, /* EBI CS 4 */ + <4 0 0x80000000 0x10000000>; /* NAND */ + #address-cells = <2>; + #size-cells = <1>; + clocks = <&rcc FMC_K>; + resets = <&rcc FMC_R>; + status = "disabled"; + + nand-controller@4,0 { + compatible = "st,stm32mp1-fmc2-nfc"; + reg = <4 0x00000000 0x1000>, + <4 0x08010000 0x1000>, + <4 0x08020000 0x1000>, + <4 0x01000000 0x1000>, + <4 0x09010000 0x1000>, + <4 0x09020000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&mdma 24 0x2 0x12000a02 0x0 0x0>, + <&mdma 24 0x2 0x12000a08 0x0 0x0>, + <&mdma 25 0x2 0x12000a0a 0x0 0x0>; + dma-names = "tx", "rx", "ecc"; + status = "disabled"; + }; + }; + qspi: spi@58003000 { compatible = "st,stm32f469-qspi"; reg = <0x58003000 0x1000>, <0x70000000 0x10000000>; |