diff options
| author | Tom Rini <trini@konsulko.com> | 2026-04-09 16:34:38 -0600 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2026-04-09 16:34:38 -0600 |
| commit | e2fa3e570f83ab0f9ce667ddaec9dc738bcf05b9 (patch) | |
| tree | 14de6d1a620c15e7b5bf349787edda955ee42745 /arch | |
| parent | 2a1bcefce835b827bbf88a9e112d646c5c4af9c1 (diff) | |
| parent | 4a95a2a9e13ab05e4fc309f92bc33998d80afe01 (diff) | |
Assorted fixes and tweaks, HUSH parser, preboot env variable, SMC
command enablement, s_init and 32bit/64bit code clean up, DBSC and APMU
remoteproc clean ups, UFS dev_phys_to_bus() remap support and SCIF R-Car
Gen5 support.
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-renesas/Makefile | 11 | ||||
| -rw-r--r-- | arch/arm/mach-renesas/lowlevel_init_gen3.S | 71 |
2 files changed, 8 insertions, 74 deletions
diff --git a/arch/arm/mach-renesas/Makefile b/arch/arm/mach-renesas/Makefile index c0454fffa48..652a392ba6f 100644 --- a/arch/arm/mach-renesas/Makefile +++ b/arch/arm/mach-renesas/Makefile @@ -9,10 +9,15 @@ obj-y += emac.o obj-$(CONFIG_DISPLAY_BOARDINFO) += board.o obj-$(CONFIG_TMU_TIMER) += ../../sh/lib/time.o obj-$(CONFIG_RCAR_GEN2) += lowlevel_init_ca15.o cpu_info-rcar.o +obj-$(CONFIG_RCAR_GEN3) += cpu_info-rcar.o +obj-$(CONFIG_RCAR_GEN4) += cpu_info-rcar.o +obj-$(CONFIG_RCAR_GEN5) += cpu_info-rcar.o +ifneq ($(CONFIG_ARM64),) obj-$(CONFIG_RCAR_64) += lowlevel_init_gen3.o -obj-$(CONFIG_RCAR_GEN3) += cpu_info-rcar.o memmap-gen3.o -obj-$(CONFIG_RCAR_GEN4) += cpu_info-rcar.o memmap-gen3.o -obj-$(CONFIG_RCAR_GEN5) += cpu_info-rcar.o memmap-gen3.o +obj-$(CONFIG_RCAR_GEN3) += memmap-gen3.o +obj-$(CONFIG_RCAR_GEN4) += memmap-gen3.o +obj-$(CONFIG_RCAR_GEN5) += memmap-gen3.o +endif obj-$(CONFIG_RZ_G2) += cpu_info-rzg.o obj-$(CONFIG_RZG2L) += cpu_info-rzg2l.o memmap-rzg2l.o diff --git a/arch/arm/mach-renesas/lowlevel_init_gen3.S b/arch/arm/mach-renesas/lowlevel_init_gen3.S index 0d7780031ac..d0dd140f7a7 100644 --- a/arch/arm/mach-renesas/lowlevel_init_gen3.S +++ b/arch/arm/mach-renesas/lowlevel_init_gen3.S @@ -30,74 +30,3 @@ ENTRY(save_boot_params) stp x2, x3, [x8], #16 b save_boot_params_ret ENDPROC(save_boot_params) - -.pushsection .text.s_init, "ax" -WEAK(s_init) - ret -ENDPROC(s_init) -.popsection - -ENTRY(lowlevel_init) - mov x29, lr /* Save LR */ - -#ifndef CONFIG_ARMV8_MULTIENTRY - /* - * For single-entry systems the lowlevel init is very simple. - */ - ldr x0, =GICD_BASE - bl gic_init_secure - -#else /* CONFIG_ARMV8_MULTIENTRY is set */ - -#if defined(CONFIG_GICV2) || defined(CONFIG_GICV3) - branch_if_slave x0, 1f - ldr x0, =GICD_BASE - bl gic_init_secure -1: -#if defined(CONFIG_GICV3) - ldr x0, =GICR_BASE - bl gic_init_secure_percpu -#elif defined(CONFIG_GICV2) - ldr x0, =GICD_BASE - ldr x1, =GICC_BASE - bl gic_init_secure_percpu -#endif -#endif - - branch_if_master x0, 2f - - /* - * Slave should wait for master clearing spin table. - * This sync prevent salves observing incorrect - * value of spin table and jumping to wrong place. - */ -#if defined(CONFIG_GICV2) || defined(CONFIG_GICV3) -#ifdef CONFIG_GICV2 - ldr x0, =GICC_BASE -#endif - bl gic_wait_for_interrupt -#endif - - /* - * All slaves will enter EL2 and optionally EL1. - */ - adr x4, lowlevel_in_el2 - ldr x5, =ES_TO_AARCH64 - bl armv8_switch_to_el2 - -lowlevel_in_el2: -#ifdef CONFIG_ARMV8_SWITCH_TO_EL1 - adr x4, lowlevel_in_el1 - ldr x5, =ES_TO_AARCH64 - bl armv8_switch_to_el1 - -lowlevel_in_el1: -#endif -#endif /* CONFIG_ARMV8_MULTIENTRY */ - - bl s_init - -2: - mov lr, x29 /* Restore LR */ - ret -ENDPROC(lowlevel_init) |