diff options
| author | Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> | 2020-03-11 15:00:43 +0300 |
|---|---|---|
| committer | Alexey Brodkin <abrodkin@synopsys.com> | 2020-04-16 23:36:36 +0300 |
| commit | b15cb0bfe8c77002ab639378b548f2c817283315 (patch) | |
| tree | cf199dbd7a5bdca278c8c3c68bec031562072ad8 /arch/arc/include/asm/cache.h | |
| parent | dba0a6ae1907bbff3ebda06e4874d006f10db1bb (diff) | |
ARC: CACHE: add support for SL$ disable
Since version 3.0 ARC HS supports SL$ (L2 system level cache)
disable. So add support for SL$ disable/enable to code.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Diffstat (limited to 'arch/arc/include/asm/cache.h')
| -rw-r--r-- | arch/arc/include/asm/cache.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arc/include/asm/cache.h b/arch/arc/include/asm/cache.h index 0fdcf2d2dd5..ab61846b5ab 100644 --- a/arch/arc/include/asm/cache.h +++ b/arch/arc/include/asm/cache.h @@ -40,6 +40,13 @@ static const inline int is_ioc_enabled(void) return IS_ENABLED(CONFIG_ARC_DBG_IOC_ENABLE); } +/* + * We export SLC control functions to use them in platform configuration code. + * They maust not be used in any generic code! + */ +void slc_enable(void); +void slc_disable(void); + #endif /* __ASSEMBLY__ */ #endif /* __ASM_ARC_CACHE_H */ |