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| author | Tom Rini <trini@konsulko.com> | 2024-07-03 14:42:11 -0600 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2024-07-03 14:42:11 -0600 |
| commit | f0a259c25f60f4da72707a54dbd2f990d24d0d82 (patch) | |
| tree | a30ef3441fb7d8289c84d38ad0cc04552840c6b2 /arch/arm/cpu/arm11/cpu.c | |
| parent | 005105b11cefe694dcd40572639973fbb9b31646 (diff) | |
| parent | 7d6cee2cd0e2e2507aca1e3a6fe0e2cb241a116e (diff) | |
Merge patch series "m68k: Implement a default flush_dcache_all"
Tom Rini <trini@konsulko.com> says:
Prior to this series we had some de-facto required cache functions that
were either unimplemented on some architectures or differently named.
This would lead in some cases to having multiple "weak" functions
available as well. Rework things so that an architecture must provide
these functions and it is up to that architecture if a "weak" default
function makes sense, or not.
Diffstat (limited to 'arch/arm/cpu/arm11/cpu.c')
| -rw-r--r-- | arch/arm/cpu/arm11/cpu.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/cpu/arm11/cpu.c b/arch/arm/cpu/arm11/cpu.c index 01d2e1a125d..4bf0446b543 100644 --- a/arch/arm/cpu/arm11/cpu.c +++ b/arch/arm/cpu/arm11/cpu.c @@ -116,3 +116,15 @@ void enable_caches(void) #endif } #endif + +#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF) +/* Invalidate entire I-cache */ +void invalidate_icache_all(void) +{ + unsigned long i = 0; + + asm ("mcr p15, 0, %0, c7, c5, 0" : : "r" (i)); +} +#else +void invalidate_icache_all(void) {} +#endif |