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| author | Marek Vasut <marex@denx.de> | 2014-05-15 00:20:54 +0200 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2014-05-15 00:20:54 +0200 |
| commit | 4180b3dba25c2c28cc4502f1c9f1cbad2a9972b8 (patch) | |
| tree | ce2ac59e3f933e6c7f220edf3b14a2e46174ef14 /arch/arm/cpu/arm720t/tegra114/cpu.c | |
| parent | fc25fa27e5f439705e9ca42182014e2d75d9f0ae (diff) | |
| parent | 2072e7262965bb48d7fffb1e283101e6ed8b21a8 (diff) | |
Merge remote-tracking branch 'u-boot/master' into test
Diffstat (limited to 'arch/arm/cpu/arm720t/tegra114/cpu.c')
| -rw-r--r-- | arch/arm/cpu/arm720t/tegra114/cpu.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/cpu/arm720t/tegra114/cpu.c b/arch/arm/cpu/arm720t/tegra114/cpu.c index d10b96a1d45..5ed3bb9d9ab 100644 --- a/arch/arm/cpu/arm720t/tegra114/cpu.c +++ b/arch/arm/cpu/arm720t/tegra114/cpu.c @@ -34,8 +34,8 @@ static void enable_cpu_power_rail(void) debug("enable_cpu_power_rail entry\n"); /* un-tristate PWR_I2C SCL/SDA, rest of the defaults are correct */ - pinmux_tristate_disable(PINGRP_PWR_I2C_SCL); - pinmux_tristate_disable(PINGRP_PWR_I2C_SDA); + pinmux_tristate_disable(PMUX_PINGRP_PWR_I2C_SCL_PZ6); + pinmux_tristate_disable(PMUX_PINGRP_PWR_I2C_SDA_PZ7); /* * Set CPUPWRGOOD_TIMER - APB clock is 1/2 of SCLK (102MHz), |