diff options
| author | Yangbo Lu <yangbo.lu@nxp.com> | 2019-11-12 19:28:38 +0800 |
|---|---|---|
| committer | Peng Fan <peng.fan@nxp.com> | 2019-11-27 16:55:56 +0800 |
| commit | d3eb317ea50ef763a5a1ef5ff4e2bc19498542d1 (patch) | |
| tree | 1e93247139eff9a521651669e8183f274383f105 /arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c | |
| parent | d9114e2b73552be7f9035c7567ea14febefa0dce (diff) | |
arm: drop eSDHC clock getting in mxc_get_clock() for layerscape
Although layerscape platforms reuse mxc_get_clock() of i.MX platforms,
eSDHC clock getting do not have to use it. It uses global data
gd->arch.sdhc_clk directly in fsl_esdhc driver. Even there are more
than one eSDHC controllers on SoC, they use same reference clock.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c')
| -rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c | 15 |
1 files changed, 0 insertions, 15 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c index bbd550b0365..ede96742aad 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c @@ -236,16 +236,6 @@ int get_dspi_freq(ulong dummy) return get_bus_freq(0) / CONFIG_SYS_FSL_DSPI_CLK_DIV; } -#ifdef CONFIG_FSL_ESDHC -int get_sdhc_freq(ulong dummy) -{ - if (!gd->arch.sdhc_clk) - get_clocks(); - - return gd->arch.sdhc_clk; -} -#endif - int get_serial_clock(void) { return get_bus_freq(0) / CONFIG_SYS_FSL_DUART_CLK_DIV; @@ -256,11 +246,6 @@ unsigned int mxc_get_clock(enum mxc_clock clk) switch (clk) { case MXC_I2C_CLK: return get_i2c_freq(0); -#if defined(CONFIG_FSL_ESDHC) - case MXC_ESDHC_CLK: - case MXC_ESDHC2_CLK: - return get_sdhc_freq(0); -#endif case MXC_DSPI_CLK: return get_dspi_freq(0); default: |