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| author | Tom Rini <trini@konsulko.com> | 2026-03-09 15:26:34 -0600 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2026-03-09 15:26:34 -0600 |
| commit | 1e240f7206fccde4ec73ea432ab8360d321c5fe5 (patch) | |
| tree | 931d5985e8a237b5604999922f5662fc464a8817 /arch/arm/cpu | |
| parent | 36add050eea439f0b2a15e4ea0d3a8e21216f159 (diff) | |
| parent | ba7bf918dafcd093ad733b07ba490baeb20cf5da (diff) | |
Merge tag 'v2026.04-rc4' into next
Prepare v2026.04-rc4
Diffstat (limited to 'arch/arm/cpu')
| -rw-r--r-- | arch/arm/cpu/armv8/cache_v8.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c index 0309da6d397..39479df7b21 100644 --- a/arch/arm/cpu/armv8/cache_v8.c +++ b/arch/arm/cpu/armv8/cache_v8.c @@ -878,15 +878,16 @@ void flush_dcache_range(unsigned long start, unsigned long stop) void dcache_enable(void) { /* The data cache is not active unless the mmu is enabled */ - if (!mmu_status()) + if (!mmu_status()) { + __asm_invalidate_tlb_all(); mmu_setup(); + } /* Set up page tables only once (it is done also by mmu_setup()) */ if (!gd->arch.tlb_fillptr) setup_all_pgtables(); invalidate_dcache_all(); - __asm_invalidate_tlb_all(); set_sctlr(get_sctlr() | CR_C); } |