diff options
| author | Stefan Bosch <stefan_b@posteo.net> | 2024-01-26 12:50:56 +0000 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2024-03-01 18:34:08 -0500 |
| commit | 934dec0af0f74c0ff1f53885e6e97b114f66e77b (patch) | |
| tree | 6d807b9c720f2f4c76e3fd0bf61d312002be6b72 /arch/arm/cpu | |
| parent | d819250c2af656cad7e0bf0cbf9529f3b8a5e7d2 (diff) | |
arm: s5p4418: fix relocation of vectors
The header (NSIH) used for the s5p4418-SoC is not loaded into RAM by the
2nd-bootloader, see boot0.h. Therefore, use an adapted version of
relocate_vectors which relocates the vectors after the header (at _start)
instead of the 'dummy'-vectors at the start of the header (at
__image_copy_start).
Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'arch/arm/cpu')
| -rw-r--r-- | arch/arm/cpu/armv7/s5p4418/Makefile | 3 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/s5p4418/relocate.S | 24 |
2 files changed, 27 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/s5p4418/Makefile b/arch/arm/cpu/armv7/s5p4418/Makefile index 321b257b6d4..58042581c42 100644 --- a/arch/arm/cpu/armv7/s5p4418/Makefile +++ b/arch/arm/cpu/armv7/s5p4418/Makefile @@ -2,5 +2,8 @@ # # (C) Copyright 2016 Nexell # Hyunseok, Jung <hsjung@nexell.co.kr> +# +# Copyright (C) 2023 Stefan Bosch <stefan_b@posteo.net> obj-y += cpu.o +obj-y += relocate.o diff --git a/arch/arm/cpu/armv7/s5p4418/relocate.S b/arch/arm/cpu/armv7/s5p4418/relocate.S new file mode 100644 index 00000000000..d6e76adceb1 --- /dev/null +++ b/arch/arm/cpu/armv7/s5p4418/relocate.S @@ -0,0 +1,24 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * relocate - S5P4418 specific relocation for ARM U-Boot + * + * Copyright (c) 2013 Albert ARIBAUD <albert.u.boot@aribaud.net> + * Copyright (C) 2023 Stefan Bosch <stefan_b@posteo.net> + */ + +#include <asm-offsets.h> +#include <asm/assembler.h> +#include <linux/linkage.h> + +ENTRY(relocate_vectors) + + /* + * The s5p4418 SoC has the security extensions, so use VBAR to relocate + * the exception vectors. + */ + ldr r0, [r9, #GD_RELOCADDR] /* r0 = gd->relocaddr */ + add r0, #0x400 /* vectors are after NSIH + 0x200 */ + mcr p15, 0, r0, c12, c0, 0 /* Set VBAR */ + ret lr + +ENDPROC(relocate_vectors) |