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| author | Tom Rini <trini@konsulko.com> | 2025-07-31 08:42:06 -0600 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2025-07-31 08:42:06 -0600 |
| commit | eef444c38994aee9cd3c6e4df5791b5f7209c8d8 (patch) | |
| tree | cea1d9071449690a92258961ca876a42ca0bc739 /arch/arm/dts | |
| parent | 79f3e77133bd7248e4579827effc13f97a32a8a8 (diff) | |
| parent | 4064e7c9fc42c1c376bd919a80b451273472f3df (diff) | |
Merge tag 'u-boot-socfpga-next-20250731' of https://source.denx.de/u-boot/custodians/u-boot-socfpga
This pull request includes updates for the SoCFPGA platform intended for the 2025.10 release
cycle. The highlights focus on enabling the Power Manager for Agilex5, NAND boot support
enhancements, and various bug fixes and cleanups across SoCFPGA components.
CI:
* https://source.denx.de/u-boot/custodians/u-boot-socfpga/-/pipelines/27221
Summary of changes:
Agilex5 Power Manager:
* Initial driver support and DT bindings are added for the Agilex5 Power Manager, enabling
better power domain control.
NAND Boot Support for Agilex5:
* SPL support for NAND boot is enabled.
* UBI/UBIFS support is configured in defconfigs.
* Memory layout updates (malloc and BSS relocation) ensure proper boot behavior.
Code Quality Improvements:
* Coverity and runtime bug fixes (e.g., jtag_usercode check, sub-device conditionals).
* Several cleanup patches addressing formatting, logic, and initialization issues.
General Maintenance:
* SPDX license tags and header include fixes.
* Device tree updates to limit SPI clock frequency and other minor adjustments.
These contributions come from Alif Zakuan Yuslaimi, Andrew Goodbody, Dinesh Maniyam, Naresh
Kumar Ravulapalli, and Tingting Meng.
This patch set has been tested on Agilex 5 devkit.
Diffstat (limited to 'arch/arm/dts')
| -rw-r--r-- | arch/arm/dts/socfpga_agilex5-u-boot.dtsi | 6 | ||||
| -rw-r--r-- | arch/arm/dts/socfpga_agilex5.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm/dts/socfpga_agilex5_socdk-u-boot.dtsi | 2 |
3 files changed, 9 insertions, 1 deletions
diff --git a/arch/arm/dts/socfpga_agilex5-u-boot.dtsi b/arch/arm/dts/socfpga_agilex5-u-boot.dtsi index 874e71b5ca4..402f0bec173 100644 --- a/arch/arm/dts/socfpga_agilex5-u-boot.dtsi +++ b/arch/arm/dts/socfpga_agilex5-u-boot.dtsi @@ -668,6 +668,12 @@ bootph-all; }; }; + + pwrmgr: pwrmgr@10d14000 { + compatible = "altr,pmgr-agilex5"; + reg = <0x10d14000 0x100>; + bootph-all; + }; }; }; diff --git a/arch/arm/dts/socfpga_agilex5.dtsi b/arch/arm/dts/socfpga_agilex5.dtsi index 86322d7b0ce..9bc3864022b 100644 --- a/arch/arm/dts/socfpga_agilex5.dtsi +++ b/arch/arm/dts/socfpga_agilex5.dtsi @@ -388,6 +388,7 @@ reg-io-width = <4>; num-cs = <4>; clocks = <&clkmgr AGILEX5_L4_MAIN_CLK>; + spi-max-frequency = <50000000>; status = "disabled"; }; @@ -402,6 +403,7 @@ reg-io-width = <4>; num-cs = <4>; clocks = <&clkmgr AGILEX5_L4_MAIN_CLK>; + spi-max-frequency = <50000000>; status = "disabled"; }; diff --git a/arch/arm/dts/socfpga_agilex5_socdk-u-boot.dtsi b/arch/arm/dts/socfpga_agilex5_socdk-u-boot.dtsi index 8d7dc0945ab..938ddb04c04 100644 --- a/arch/arm/dts/socfpga_agilex5_socdk-u-boot.dtsi +++ b/arch/arm/dts/socfpga_agilex5_socdk-u-boot.dtsi @@ -67,7 +67,7 @@ chosen { stdout-path = "serial0:115200n8"; - u-boot,spl-boot-order = &mmc,&flash0,"/memory"; + u-boot,spl-boot-order = &mmc,&flash0,&nand,"/memory"; }; }; |