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authorTom Rini <trini@konsulko.com>2016-12-18 13:54:25 -0500
committerTom Rini <trini@konsulko.com>2016-12-18 17:43:20 -0500
commit8ea05705a70135a94419b0d243666c1b51fe1f8d (patch)
tree495da728ccebe411445c144fb88ba35041db2096 /arch/arm/imx-common/cache.c
parent0b4bc1b3ab1850fccbade3e6103f2036f6bdb364 (diff)
parent854bb75be98ad792ff64c26ae38a1392ea185cd6 (diff)
Merge branch 'master' of git://www.denx.de/git/u-boot-imx
Migrate CONFIG_ARCH_USE_MEMSET/MEMCPY with this merge. Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/arm/imx-common/cache.c')
-rw-r--r--arch/arm/imx-common/cache.c17
1 files changed, 9 insertions, 8 deletions
diff --git a/arch/arm/imx-common/cache.c b/arch/arm/imx-common/cache.c
index b77548821db..1c4a9a28c89 100644
--- a/arch/arm/imx-common/cache.c
+++ b/arch/arm/imx-common/cache.c
@@ -8,6 +8,7 @@
#include <asm/armv7.h>
#include <asm/pl310.h>
#include <asm/io.h>
+#include <asm/imx-common/sys_proto.h>
#ifndef CONFIG_SYS_DCACHE_OFF
void enable_caches(void)
@@ -39,6 +40,7 @@ void enable_caches(void)
void v7_outer_cache_enable(void)
{
struct pl310_regs *const pl310 = (struct pl310_regs *)L2_PL310_BASE;
+ struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
unsigned int val;
@@ -55,15 +57,14 @@ void v7_outer_cache_enable(void)
*/
setbits_le32(&pl310->pl310_aux_ctrl, L310_SHARED_ATT_OVERRIDE_ENABLE);
-#if defined CONFIG_MX6SL
- struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
- val = readl(&iomux->gpr[11]);
- if (val & IOMUXC_GPR11_L2CACHE_AS_OCRAM) {
- /* L2 cache configured as OCRAM, reset it */
- val &= ~IOMUXC_GPR11_L2CACHE_AS_OCRAM;
- writel(val, &iomux->gpr[11]);
+ if (is_mx6sl() || is_mx6sll()) {
+ val = readl(&iomux->gpr[11]);
+ if (val & IOMUXC_GPR11_L2CACHE_AS_OCRAM) {
+ /* L2 cache configured as OCRAM, reset it */
+ val &= ~IOMUXC_GPR11_L2CACHE_AS_OCRAM;
+ writel(val, &iomux->gpr[11]);
+ }
}
-#endif
writel(0x132, &pl310->pl310_tag_latency_ctrl);
writel(0x132, &pl310->pl310_data_latency_ctrl);