diff options
| author | Marek Vasut <marek.vasut@gmail.com> | 2010-04-17 00:35:52 +0200 | 
|---|---|---|
| committer | Marek Vasut <marek.vasut@gmail.com> | 2010-06-13 13:39:11 +0200 | 
| commit | bb596e84ebd6e43d862b13755419b8a3e01b4f51 (patch) | |
| tree | 48a56a5e300f8d61e821df91fd09d814c81132d4 /arch/arm/include/asm/arch-pxa | |
| parent | 52dc45e5a3e60251329096400da5a9bb6a12ccbf (diff) | |
PXA: Add missing MDREFR bits
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Diffstat (limited to 'arch/arm/include/asm/arch-pxa')
| -rw-r--r-- | arch/arm/include/asm/arch-pxa/pxa-regs.h | 3 | 
1 files changed, 3 insertions, 0 deletions
| diff --git a/arch/arm/include/asm/arch-pxa/pxa-regs.h b/arch/arm/include/asm/arch-pxa/pxa-regs.h index 7cd7a14a95c..cd7b7f9461b 100644 --- a/arch/arm/include/asm/arch-pxa/pxa-regs.h +++ b/arch/arm/include/asm/arch-pxa/pxa-regs.h @@ -2421,6 +2421,9 @@ typedef void		(*ExcpHndlr) (void) ;  #define MDMRS		__REG(0x48000040)  /* MRS value to be written to SDRAM */  #define BOOT_DEF	__REG(0x48000044)  /* Read-Only Boot-Time Register. Contains BOOT_SEL and PKG_SEL */ +#define MDREFR_ALTREFA	(1 << 31)	/* Exiting Alternate Bus Master Mode Refresh Control */ +#define MDREFR_ALTREFB	(1 << 30)	/* Entering Alternate Bus Master Mode Refresh Control */ +#define MDREFR_K0DB4	(1 << 29)	/* SDCLK0 Divide by 4 Control/Status */  #define MDREFR_K2FREE	(1 << 25)	/* SDRAM Free-Running Control */  #define MDREFR_K1FREE	(1 << 24)	/* SDRAM Free-Running Control */  #define MDREFR_K0FREE	(1 << 23)	/* SDRAM Free-Running Control */ | 
