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| author | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2015-05-05 10:09:06 +0200 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2015-05-05 10:09:06 +0200 |
| commit | b939689c7b87773c44275a578ffc8674a867e39d (patch) | |
| tree | 785d71eb0bbc707385e4456a14b21706223d99a3 /arch/arm/include/asm/arch-socfpga/reset_manager.h | |
| parent | 97840b5d1fe0960134c3553a9d9d1c1cd1be784d (diff) | |
| parent | ace97d26176a3ebc9ec07738450de93eea35975c (diff) | |
Merge branch 'u-boot/master' into 'u-boot-arm/master'
Diffstat (limited to 'arch/arm/include/asm/arch-socfpga/reset_manager.h')
| -rw-r--r-- | arch/arm/include/asm/arch-socfpga/reset_manager.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-socfpga/reset_manager.h b/arch/arm/include/asm/arch-socfpga/reset_manager.h index 034135bff46..d63a2850912 100644 --- a/arch/arm/include/asm/arch-socfpga/reset_manager.h +++ b/arch/arm/include/asm/arch-socfpga/reset_manager.h @@ -15,6 +15,9 @@ void socfpga_bridges_reset(int enable); void socfpga_emac_reset(int enable); void socfpga_watchdog_reset(void); void socfpga_spim_enable(void); +void socfpga_uart0_enable(void); +void socfpga_sdram_enable(void); +void socfpga_osc1timer_enable(void); struct socfpga_reset_manager { u32 status; @@ -36,7 +39,10 @@ struct socfpga_reset_manager { #define RSTMGR_PERMODRST_EMAC0_LSB 0 #define RSTMGR_PERMODRST_EMAC1_LSB 1 #define RSTMGR_PERMODRST_L4WD0_LSB 6 +#define RSTMGR_PERMODRST_OSC1TIMER0_LSB 8 +#define RSTMGR_PERMODRST_UART0_LSB 16 #define RSTMGR_PERMODRST_SPIM0_LSB 18 #define RSTMGR_PERMODRST_SPIM1_LSB 19 +#define RSTMGR_PERMODRST_SDR_LSB 29 #endif /* _RESET_MANAGER_H_ */ |