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| author | Tom Rini <trini@konsulko.com> | 2020-04-25 08:20:22 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2020-04-25 08:20:22 -0400 |
| commit | d202f67db0771247de562af5d6a5df778702857b (patch) | |
| tree | 7c48f316e008c90e19b54f93e1ede85bfe237fcb /arch/arm/include/asm/cache.h | |
| parent | 4d131cdb6762694fc1a66d6b3e39a82f9ec691cf (diff) | |
| parent | 691132e850539cb0956a106933d5bde37470bfc7 (diff) | |
Merge branch '2020-04-25-master-imports'
- Assorted minor fixes
- Actions S700 SoC and Cubieboard7 support
Diffstat (limited to 'arch/arm/include/asm/cache.h')
| -rw-r--r-- | arch/arm/include/asm/cache.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h index 950ec1e793c..c20e05ec7fd 100644 --- a/arch/arm/include/asm/cache.h +++ b/arch/arm/include/asm/cache.h @@ -49,4 +49,15 @@ void dram_bank_mmu_setup(int bank); */ #define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE +/* + * arm_reserve_mmu() - Reserve memory for MMU TLB table + * + * Default implementation for reserving memory for MMU TLB table. It is used + * during generic board init sequence in common/board_f.c. Weakly defined, so + * that machines can override it if needed. + * + * Return: 0 if OK + */ +int arm_reserve_mmu(void); + #endif /* _ASM_CACHE_H */ |