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authorTom Rini <trini@konsulko.com>2022-03-02 13:59:33 -0500
committerTom Rini <trini@konsulko.com>2022-03-02 13:59:33 -0500
commit2dfdba4a5a48de33a3cedc908c183b86b6ff7bd5 (patch)
treeda9d57e285034143ed1e9cd4dfc30577792275ad /arch/arm/include/asm/system.h
parentf861ffa660dc47c4017c220b94d10a64439d46a7 (diff)
parent5ff4857d3569710c0f1ce1848f1e7486e3a4cfbe (diff)
Merge branch '2022-03-02-armv8-fixes-and-cleanups' into next
To quote the author: I was looking into the arm64 boot code lately and stumbled upon some issues. Also Nishanth brought back memories of a lengthy debug session, which was caused due to U-Boot keeping SErrors masked. As the resulting patches are all somewhat related, I gathered this series here to address those problems. Patches 1 to 3 address exception handling issues, with the SError enablement being the most prominent fix here. Patch 4 cleans up asm/io.h. This was on the list before[1], but was somehow lost when it was intercepted by a shorter version of itself. Patches 5 and 6 clean up some unnecessarily complicated AArch64 assembly code.
Diffstat (limited to 'arch/arm/include/asm/system.h')
-rw-r--r--arch/arm/include/asm/system.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index f75eea16b36..87d1c77e8b1 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -82,6 +82,7 @@
#define HCR_EL2_RW_AARCH64 (1 << 31) /* EL1 is AArch64 */
#define HCR_EL2_RW_AARCH32 (0 << 31) /* Lower levels are AArch32 */
#define HCR_EL2_HCD_DIS (1 << 29) /* Hypervisor Call disabled */
+#define HCR_EL2_AMO_EL2 (1 << 5) /* Route SErrors to EL2 */
/*
* ID_AA64ISAR1_EL1 bits definitions