diff options
| author | Tom Rini <trini@konsulko.com> | 2024-01-06 09:57:56 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2024-01-06 09:57:56 -0500 |
| commit | c2c598e87cfe56f5991730762c00733c5aa9a994 (patch) | |
| tree | c1e2b4921b809a3dbcad70b9202ac581f4b18daf /arch/arm/include | |
| parent | 18fa946ab9f7b3b78af5b8b6f5da2efebb1cd21f (diff) | |
| parent | 86e581a5609dc4b2876e5c3e2e458c91879b353c (diff) | |
Merge branch 'staging' of https://source.denx.de/u-boot/custodians/u-boot-tegra into next
Documentation updates for endeavoru, lg_x3, grouper and transformers,
addition of MIPI calibration clock name for T114 (inline with T124+),
conversion of TEGRA_SUPPORT_NON_SECURE into Kconfig and endeavoru
stability improvements.
Diffstat (limited to 'arch/arm/include')
| -rw-r--r-- | arch/arm/include/asm/arch-tegra114/clock-tables.h | 2 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-tegra114/mc.h | 29 |
2 files changed, 28 insertions, 3 deletions
diff --git a/arch/arm/include/asm/arch-tegra114/clock-tables.h b/arch/arm/include/asm/arch-tegra114/clock-tables.h index 95fadd0c594..af4d48144a8 100644 --- a/arch/arm/include/asm/arch-tegra114/clock-tables.h +++ b/arch/arm/include/asm/arch-tegra114/clock-tables.h @@ -109,7 +109,7 @@ enum periph_id { PERIPH_ID_UART3, /* 56 */ - PERIPH_ID_RESERVED56, + PERIPH_ID_MIPI_CAL, PERIPH_ID_EMC, PERIPH_ID_USB2, PERIPH_ID_USB3, diff --git a/arch/arm/include/asm/arch-tegra114/mc.h b/arch/arm/include/asm/arch-tegra114/mc.h index 3930bab571f..2fd2f50b0e5 100644 --- a/arch/arm/include/asm/arch-tegra114/mc.h +++ b/arch/arm/include/asm/arch-tegra114/mc.h @@ -25,9 +25,34 @@ struct mc_ctlr { u32 mc_emem_adr_cfg; /* offset 0x54 */ u32 mc_emem_adr_cfg_dev0; /* offset 0x58 */ u32 mc_emem_adr_cfg_dev1; /* offset 0x5C */ - u32 reserved3[12]; /* offset 0x60 - 0x8C */ + u32 reserved3[4]; /* offset 0x60 - 0x6C */ + u32 mc_security_cfg0; /* offset 0x70 */ + u32 mc_security_cfg1; /* offset 0x74 */ + u32 reserved4[6]; /* offset 0x7C - 0x8C */ u32 mc_emem_arb_reserved[28]; /* offset 0x90 - 0xFC */ - u32 reserved4[338]; /* offset 0x100 - 0x644 */ + u32 reserved5[74]; /* offset 0x100 - 0x224 */ + u32 mc_smmu_translation_enable_0; /* offset 0x228 */ + u32 mc_smmu_translation_enable_1; /* offset 0x22C */ + u32 mc_smmu_translation_enable_2; /* offset 0x230 */ + u32 mc_smmu_translation_enable_3; /* offset 0x234 */ + u32 mc_smmu_afi_asid; /* offset 0x238 */ + u32 mc_smmu_avpc_asid; /* offset 0x23C */ + u32 mc_smmu_dc_asid; /* offset 0x240 */ + u32 mc_smmu_dcb_asid; /* offset 0x244 */ + u32 reserved6[2]; /* offset 0x248 - 0x24C */ + u32 mc_smmu_hc_asid; /* offset 0x250 */ + u32 mc_smmu_hda_asid; /* offset 0x254 */ + u32 mc_smmu_isp_asid; /* offset 0x258 */ + u32 reserved7[2]; /* offset 0x25C - 0x260 */ + u32 mc_smmu_mpe_asid; /* offset 0x264 */ + u32 mc_smmu_nv_asid; /* offset 0x268 */ + u32 mc_smmu_nv2_asid; /* offset 0x26C */ + u32 mc_smmu_ppcs_asid; /* offset 0x270 */ + u32 reserved8[1]; /* offset 0x274 */ + u32 mc_smmu_sata_asid; /* offset 0x278 */ + u32 mc_smmu_vde_asid; /* offset 0x27C */ + u32 mc_smmu_vi_asid; /* offset 0x280 */ + u32 reserved9[241]; /* offset 0x284 - 0x644 */ u32 mc_video_protect_bom; /* offset 0x648 */ u32 mc_video_protect_size_mb; /* offset 0x64c */ u32 mc_video_protect_reg_ctrl; /* offset 0x650 */ |