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authorChris Packham <judge.packham@gmail.com>2023-10-27 13:23:52 +1300
committerTom Rini <trini@konsulko.com>2023-11-17 11:58:26 -0500
commitee23d7466c77d01ee63efb76db2c5fd3b7cdd6f7 (patch)
treecb383519c0ed6adee8e4d0fd77433506928dc9d3 /arch/arm/include
parentac33a7976a5631e05fdb8f6c75be5f824dcf5229 (diff)
Revert "armv8: enable HAFDBS for other ELx when FEAT_HAFDBS is present"
This reverts commit c1da6fdb5c239b432440721772d993e63cfdeb20. This is part of a series trying to make use of the arm64 hardware features for tracking dirty pages. Unfortunately this series causes problems for the AC5/AC5X SoCs. Having exhausted other options the consensus seems to be reverting this series is the best course of action. Signed-off-by: Chris Packham <judge.packham@gmail.com>
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/armv8/mmu.h10
1 files changed, 2 insertions, 8 deletions
diff --git a/arch/arm/include/asm/armv8/mmu.h b/arch/arm/include/asm/armv8/mmu.h
index 4f0adb07325..27658e56395 100644
--- a/arch/arm/include/asm/armv8/mmu.h
+++ b/arch/arm/include/asm/armv8/mmu.h
@@ -102,14 +102,8 @@
#define TCR_TG0_16K (2 << 14)
#define TCR_EPD1_DISABLE (1 << 23)
-#define TCR_EL1_HA BIT(39)
-#define TCR_EL1_HD BIT(40)
-
-#define TCR_EL2_HA BIT(21)
-#define TCR_EL2_HD BIT(22)
-
-#define TCR_EL3_HA BIT(21)
-#define TCR_EL3_HD BIT(22)
+#define TCR_HA BIT(39)
+#define TCR_HD BIT(40)
#define TCR_EL1_RSVD (1U << 31)
#define TCR_EL2_RSVD (1U << 31 | 1 << 23)