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authorTom Rini <trini@konsulko.com>2025-01-17 08:27:40 -0600
committerTom Rini <trini@konsulko.com>2025-01-17 08:27:40 -0600
commitc11dc783fb4418393dd08d39ee01debfc2dea4d4 (patch)
tree9be496ff4f01fc070d3abde475e009aba1a2610c /arch/arm/lib/cache-cp15.c
parentea3324b3444f174ddf033129a920dd9675c6521f (diff)
parentb3ce35900cfa500a31fad652302a92cab604d6b5 (diff)
Merge https://source.denx.de/u-boot/custodians/u-boot-riscv
CI: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/24215 - RISC-V: Add "riscv,isa-extensions" and multi-letter extension parsing support - RISC-V: Add default cache line size - Board: Canaan: Add K230-CanMV support - Board: VisionFive2: Split out target specific configuration
Diffstat (limited to 'arch/arm/lib/cache-cp15.c')
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