Merge branch '2022-12-05-Kconfig-migrations-and-renames' into next

- First batch of the patches that end up with
  scripts/config_whitelist.tx being empty. Mostly migrations and a
  little bit of code removal and CFG renaming.

4 files changed, 41 insertions, 41 deletions

diff --git a/arch/arm/mach-at91/arm920t/clock.c b/arch/arm/mach-at91/arm920t/clock.c
index c7440278d8f..09ac66d619d 100644
--- a/arch/arm/mach-at91/arm920t/clock.c
+++ b/arch/arm/mach-at91/arm920t/clock.c
@@ -26,7 +26,7 @@ static unsigned long at91_css_to_rate(unsigned long css)
 {
 	switch (css) {
 	case AT91_PMC_MCKR_CSS_SLOW:
-		return CONFIG_SYS_AT91_SLOW_CLOCK;
+		return CFG_SYS_AT91_SLOW_CLOCK;
 	case AT91_PMC_MCKR_CSS_MAIN:
 		return gd->arch.main_clk_rate_hz;
 	case AT91_PMC_MCKR_CSS_PLLA:
@@ -107,7 +107,7 @@ int at91_clock_init(unsigned long main_clock)
 {
 	unsigned freq, mckr;
 	at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
-#ifndef CONFIG_SYS_AT91_MAIN_CLOCK
+#ifndef CFG_SYS_AT91_MAIN_CLOCK
 	unsigned tmp;
 	/*
 	 * When the bootloader initialized the main oscillator correctly,
@@ -120,7 +120,7 @@ int at91_clock_init(unsigned long main_clock)
 			tmp = readl(&pmc->mcfr);
 		} while (!(tmp & AT91_PMC_MCFR_MAINRDY));
 		tmp &= AT91_PMC_MCFR_MAINF_MASK;
-		main_clock = tmp * (CONFIG_SYS_AT91_SLOW_CLOCK / 16);
+		main_clock = tmp * (CFG_SYS_AT91_SLOW_CLOCK / 16);
 	}
 #endif
 	gd->arch.main_clk_rate_hz = main_clock;
diff --git a/arch/arm/mach-at91/arm920t/cpu.c b/arch/arm/mach-at91/arm920t/cpu.c
index 44c079c0fdd..9bf03fd68ec 100644
--- a/arch/arm/mach-at91/arm920t/cpu.c
+++ b/arch/arm/mach-at91/arm920t/cpu.c
@@ -16,11 +16,11 @@
 #include <asm/arch/hardware.h>
 #include <asm/arch/clk.h>
 
-#ifndef CONFIG_SYS_AT91_MAIN_CLOCK
-#define CONFIG_SYS_AT91_MAIN_CLOCK 0
+#ifndef CFG_SYS_AT91_MAIN_CLOCK
+#define CFG_SYS_AT91_MAIN_CLOCK 0
 #endif
 
 int arch_cpu_init(void)
 {
-	return at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK);
+	return at91_clock_init(CFG_SYS_AT91_MAIN_CLOCK);
 }
diff --git a/arch/arm/mach-at91/arm920t/lowlevel_init.S b/arch/arm/mach-at91/arm920t/lowlevel_init.S
index 57e51c81059..6b7d3cbc710 100644
--- a/arch/arm/mach-at91/arm920t/lowlevel_init.S
+++ b/arch/arm/mach-at91/arm920t/lowlevel_init.S
@@ -94,11 +94,11 @@ SMRDATA:
 	.word AT91_ASM_MC_SMC_CSR0
 	.word CONFIG_SYS_SMC_CSR0_VAL
 	.word AT91_ASM_PMC_PLLAR
-	.word CONFIG_SYS_PLLAR_VAL
+	.word CFG_SYS_PLLAR_VAL
 	.word AT91_ASM_PMC_PLLBR
 	.word CONFIG_SYS_PLLBR_VAL
 	.word AT91_ASM_PMC_MCKR
-	.word CONFIG_SYS_MCKR_VAL
+	.word CFG_SYS_MCKR_VAL
 SMRDATAE:
 	/* here there's a delay */
 SMRDATA1:
@@ -107,45 +107,45 @@ SMRDATA1:
 	.word AT91_ASM_PIOC_BSR
 	.word CONFIG_SYS_PIOC_BSR_VAL
 	.word AT91_ASM_PIOC_PDR
-	.word CONFIG_SYS_PIOC_PDR_VAL
+	.word CFG_SYS_PIOC_PDR_VAL
 	.word AT91_ASM_MC_EBI_CSA
 	.word CONFIG_SYS_EBI_CSA_VAL
 	.word AT91_ASM_MC_SDRAMC_CR
-	.word CONFIG_SYS_SDRC_CR_VAL
+	.word CFG_SYS_SDRC_CR_VAL
 	.word AT91_ASM_MC_SDRAMC_MR
-	.word CONFIG_SYS_SDRC_MR_VAL
-	.word CONFIG_SYS_SDRAM
-	.word CONFIG_SYS_SDRAM_VAL
+	.word CFG_SYS_SDRC_MR_VAL
+	.word CFG_SYS_SDRAM
+	.word CFG_SYS_SDRAM_VAL
 	.word AT91_ASM_MC_SDRAMC_MR
-	.word CONFIG_SYS_SDRC_MR_VAL1
-	.word CONFIG_SYS_SDRAM
-	.word CONFIG_SYS_SDRAM_VAL
-	.word CONFIG_SYS_SDRAM
-	.word CONFIG_SYS_SDRAM_VAL
-	.word CONFIG_SYS_SDRAM
-	.word CONFIG_SYS_SDRAM_VAL
-	.word CONFIG_SYS_SDRAM
-	.word CONFIG_SYS_SDRAM_VAL
-	.word CONFIG_SYS_SDRAM
-	.word CONFIG_SYS_SDRAM_VAL
-	.word CONFIG_SYS_SDRAM
-	.word CONFIG_SYS_SDRAM_VAL
-	.word CONFIG_SYS_SDRAM
-	.word CONFIG_SYS_SDRAM_VAL
-	.word CONFIG_SYS_SDRAM
-	.word CONFIG_SYS_SDRAM_VAL
+	.word CFG_SYS_SDRC_MR_VAL1
+	.word CFG_SYS_SDRAM
+	.word CFG_SYS_SDRAM_VAL
+	.word CFG_SYS_SDRAM
+	.word CFG_SYS_SDRAM_VAL
+	.word CFG_SYS_SDRAM
+	.word CFG_SYS_SDRAM_VAL
+	.word CFG_SYS_SDRAM
+	.word CFG_SYS_SDRAM_VAL
+	.word CFG_SYS_SDRAM
+	.word CFG_SYS_SDRAM_VAL
+	.word CFG_SYS_SDRAM
+	.word CFG_SYS_SDRAM_VAL
+	.word CFG_SYS_SDRAM
+	.word CFG_SYS_SDRAM_VAL
+	.word CFG_SYS_SDRAM
+	.word CFG_SYS_SDRAM_VAL
 	.word AT91_ASM_MC_SDRAMC_MR
-	.word CONFIG_SYS_SDRC_MR_VAL2
-	.word CONFIG_SYS_SDRAM1
-	.word CONFIG_SYS_SDRAM_VAL
+	.word CFG_SYS_SDRC_MR_VAL2
+	.word CFG_SYS_SDRAM1
+	.word CFG_SYS_SDRAM_VAL
 	.word AT91_ASM_MC_SDRAMC_TR
-	.word CONFIG_SYS_SDRC_TR_VAL
-	.word CONFIG_SYS_SDRAM
-	.word CONFIG_SYS_SDRAM_VAL
+	.word CFG_SYS_SDRC_TR_VAL
+	.word CFG_SYS_SDRAM
+	.word CFG_SYS_SDRAM_VAL
 	.word AT91_ASM_MC_SDRAMC_MR
-	.word CONFIG_SYS_SDRC_MR_VAL3
-	.word CONFIG_SYS_SDRAM
-	.word CONFIG_SYS_SDRAM_VAL
+	.word CFG_SYS_SDRC_MR_VAL3
+	.word CFG_SYS_SDRAM
+	.word CFG_SYS_SDRAM_VAL
 SMRDATA1E:
 	/* SMRDATA1 is 176 bytes long */
 #endif /* CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) */
diff --git a/arch/arm/mach-at91/arm920t/timer.c b/arch/arm/mach-at91/arm920t/timer.c
index c400e878135..8ef5764e315 100644
--- a/arch/arm/mach-at91/arm920t/timer.c
+++ b/arch/arm/mach-at91/arm920t/timer.c
@@ -27,7 +27,7 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 /* the number of clocks per CONFIG_SYS_HZ */
-#define TIMER_LOAD_VAL (CONFIG_SYS_HZ_CLOCK/CONFIG_SYS_HZ)
+#define TIMER_LOAD_VAL (CFG_SYS_HZ_CLOCK/CONFIG_SYS_HZ)
 
 int timer_init(void)
 {
@@ -92,7 +92,7 @@ void __udelay(unsigned long usec)
 	u32 endtime;
 	signed long diff;
 
-	tmo = CONFIG_SYS_HZ_CLOCK / 1000;
+	tmo = CFG_SYS_HZ_CLOCK / 1000;
 	tmo *= usec;
 	tmo /= 1000;