diff options
| author | Tom Rini <trini@konsulko.com> | 2023-01-09 11:30:08 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2023-01-09 11:30:08 -0500 |
| commit | cebdfc22da6eb81793b616e855bc4d6d89c1c7a6 (patch) | |
| tree | 44eaafcbe4866712d361304882e7d56ca0ef1682 /arch/arm/mach-exynos/lowlevel_init.c | |
| parent | 62e2ad1ceafbfdf2c44d3dc1b6efc81e768a96b9 (diff) | |
| parent | fe33066d246462551f385f204690a11018336ac8 (diff) | |
Merge branch 'next'
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/arm/mach-exynos/lowlevel_init.c')
| -rw-r--r-- | arch/arm/mach-exynos/lowlevel_init.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm/mach-exynos/lowlevel_init.c b/arch/arm/mach-exynos/lowlevel_init.c index 1ff5fcac1b3..c57b8aee798 100644 --- a/arch/arm/mach-exynos/lowlevel_init.c +++ b/arch/arm/mach-exynos/lowlevel_init.c @@ -51,7 +51,7 @@ enum { #ifdef CONFIG_EXYNOS5420 /* Address for relocating helper code (Last 4 KB of IRAM) */ -#define EXYNOS_RELOCATE_CODE_BASE (CONFIG_IRAM_TOP - 0x1000) +#define EXYNOS_RELOCATE_CODE_BASE (CFG_IRAM_TOP - 0x1000) /* * Power up secondary CPUs. @@ -73,14 +73,14 @@ static void low_power_start(void) reg_val = readl(EXYNOS5420_SPARE_BASE); if (reg_val != CPU_RST_FLAG_VAL) { - writel(0x0, CONFIG_LOWPOWER_FLAG); + writel(0x0, CFG_LOWPOWER_FLAG); branch_bx(0x0); } - reg_val = readl(CONFIG_PHY_IRAM_BASE + 0x4); + reg_val = readl(CFG_PHY_IRAM_BASE + 0x4); if (reg_val != (uint32_t)&low_power_start) { /* Store jump address as low_power_start if not present */ - writel((uint32_t)&low_power_start, CONFIG_PHY_IRAM_BASE + 0x4); + writel((uint32_t)&low_power_start, CFG_PHY_IRAM_BASE + 0x4); dsb(); sev(); } @@ -160,11 +160,11 @@ static void secondary_cores_configure(void) writel(0x0, (EXYNOS_RELOCATE_CODE_BASE + 0x1C)); /* set lowpower flag and address */ - writel(CPU_RST_FLAG_VAL, CONFIG_LOWPOWER_FLAG); - writel((uint32_t)&low_power_start, CONFIG_LOWPOWER_ADDR); + writel(CPU_RST_FLAG_VAL, CFG_LOWPOWER_FLAG); + writel((uint32_t)&low_power_start, CFG_LOWPOWER_ADDR); writel(CPU_RST_FLAG_VAL, EXYNOS5420_SPARE_BASE); /* Store jump address for power down */ - writel((uint32_t)&power_down_core, CONFIG_PHY_IRAM_BASE + 0x4); + writel((uint32_t)&power_down_core, CFG_PHY_IRAM_BASE + 0x4); /* Need all core power down check */ dsb(); |