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| author | Tom Rini <trini@konsulko.com> | 2019-01-10 09:28:16 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2019-01-10 09:28:16 -0500 |
| commit | e5aa3f4d97b11271c3a2407e272a131b7e975c61 (patch) | |
| tree | 55d66c2e34af73a4721df02368e6348e89708499 /arch/arm/mach-imx/ddrmc-vf610.c | |
| parent | 43a6a1ec9055a53a11d6d735f11cceea13912bbe (diff) | |
| parent | d4a0c098925d4594355506a12ae0dbbe6eed00f2 (diff) | |
Merge tag 'u-boot-imx-20190110' of git://git.denx.de/u-boot-imx
Fixes for 2019.01
Diffstat (limited to 'arch/arm/mach-imx/ddrmc-vf610.c')
| -rw-r--r-- | arch/arm/mach-imx/ddrmc-vf610.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/mach-imx/ddrmc-vf610.c b/arch/arm/mach-imx/ddrmc-vf610.c index 3d7da1c25ee..fa948f78120 100644 --- a/arch/arm/mach-imx/ddrmc-vf610.c +++ b/arch/arm/mach-imx/ddrmc-vf610.c @@ -61,6 +61,8 @@ void ddrmc_setup_iomux(const iomux_v3_cfg_t *pads, int pads_count) VF610_PAD_DDR_WE__DDR_WE_B, VF610_PAD_DDR_ODT1__DDR_ODT_0, VF610_PAD_DDR_ODT0__DDR_ODT_1, + VF610_PAD_DDR_DDRBYTE1__DDR_DDRBYTE1, + VF610_PAD_DDR_DDRBYTE2__DDR_DDRBYTE2, VF610_PAD_DDR_RESETB, }; @@ -188,7 +190,6 @@ void ddrmc_ctrl_init_ddr3(struct ddr3_jedec_timings const *timings, DDRMC_CR77_SWAP_EN, &ddrmr->cr[77]); writel(DDRMC_CR78_Q_FULLNESS(timings->q_fullness) | DDRMC_CR78_BUR_ON_FLY_BIT(12), &ddrmr->cr[78]); - writel(DDRMC_CR79_CTLUPD_AREF(0), &ddrmr->cr[79]); writel(DDRMC_CR82_INT_MASK, &ddrmr->cr[82]); @@ -231,6 +232,7 @@ void ddrmc_ctrl_init_ddr3(struct ddr3_jedec_timings const *timings, /* all inits done, start the DDR controller */ writel(DDRMC_CR00_DRAM_CLASS_DDR3 | DDRMC_CR00_START, &ddrmr->cr[0]); - while (!(readl(&ddrmr->cr[80]) && 0x100)) + while (!(readl(&ddrmr->cr[80]) & DDRMC_CR80_MC_INIT_COMPLETE)) udelay(10); + writel(DDRMC_CR80_MC_INIT_COMPLETE, &ddrmr->cr[81]); } |