diff options
| author | Marek Vasut <marex@denx.de> | 2023-12-02 02:48:40 +0100 |
|---|---|---|
| committer | Fabio Estevam <festevam@denx.de> | 2023-12-14 15:29:08 -0300 |
| commit | 41b0f3454b2241ee323d7d10ef168199c8ca4f60 (patch) | |
| tree | 5c44bd562388af6bc20468b5a6778a4bc614c348 /arch/arm/mach-imx/imx8m/clock_imx8mm.c | |
| parent | 88db55b054768238ac48170d684303123733d709 (diff) | |
ddr: imx: Add 3600 MTps rate support
Add PLL settings for DDR 3600 MTps . This is very similar to 3200 MTps
PLL setting, except the divider is not 9 but 8 .
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Diffstat (limited to 'arch/arm/mach-imx/imx8m/clock_imx8mm.c')
| -rw-r--r-- | arch/arm/mach-imx/imx8m/clock_imx8mm.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mm.c b/arch/arm/mach-imx/imx8m/clock_imx8mm.c index 986870799d3..a24eb744601 100644 --- a/arch/arm/mach-imx/imx8m/clock_imx8mm.c +++ b/arch/arm/mach-imx/imx8m/clock_imx8mm.c @@ -56,6 +56,7 @@ int enable_i2c_clk(unsigned char enable, unsigned i2c_num) static struct imx_int_pll_rate_table imx8mm_fracpll_tbl[] = { PLL_1443X_RATE(1000000000U, 250, 3, 1, 0), PLL_1443X_RATE(933000000U, 311, 4, 1, 0), + PLL_1443X_RATE(900000000U, 300, 8, 0, 0), PLL_1443X_RATE(800000000U, 300, 9, 0, 0), PLL_1443X_RATE(750000000U, 250, 8, 0, 0), PLL_1443X_RATE(650000000U, 325, 3, 2, 0), |