diff options
| author | Tom Rini <trini@konsulko.com> | 2021-01-25 09:02:35 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2021-01-25 09:02:35 -0500 |
| commit | 4057b98ff2f3fd112f05024cad5ccf970fa9bed4 (patch) | |
| tree | aa18deef065e5469986c3326733c03e01fd914c2 /arch/arm/mach-imx/timer.c | |
| parent | 7f10b8eed450fcac6296ef53432d3b30c407cc39 (diff) | |
| parent | 4f37aa957939937f9f5b472f829ab81ef13c479a (diff) | |
Merge tag 'u-boot-imx-20210125' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
Changes for 2020.04
-------------------
- new board:
Phytec phyCORE-i.MX8MP
i.MX8MN Beacon EmbeddedWorks devkit
- Fixes:
several nanbcb fixes
fix for imx8mm_beacon
- further switch to distro boot commands
- DM:
DM Ether for MX6UL
CI:
https://gitlab.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/6013
Diffstat (limited to 'arch/arm/mach-imx/timer.c')
| -rw-r--r-- | arch/arm/mach-imx/timer.c | 16 |
1 files changed, 9 insertions, 7 deletions
diff --git a/arch/arm/mach-imx/timer.c b/arch/arm/mach-imx/timer.c index fa1941aec42..a3c47889f13 100644 --- a/arch/arm/mach-imx/timer.c +++ b/arch/arm/mach-imx/timer.c @@ -39,18 +39,16 @@ static struct mxc_gpt *cur_gpt = (struct mxc_gpt *)GPT1_BASE_ADDR; #define GPTPR_PRESCALER24M_SHIFT 12 #define GPTPR_PRESCALER24M_MASK (0xF << GPTPR_PRESCALER24M_SHIFT) +DECLARE_GLOBAL_DATA_PTR; + static inline int gpt_has_clk_source_osc(void) { -#if defined(CONFIG_MX6) if (((is_mx6dq()) && (soc_rev() > CHIP_REV_1_0)) || is_mx6dqp() || is_mx6sdl() || is_mx6sx() || is_mx6ul() || - is_mx6ull() || is_mx6sll()) + is_mx6ull() || is_mx6sll() || is_mx7()) return 1; return 0; -#else - return 0; -#endif } static inline ulong gpt_get_clk(void) @@ -73,7 +71,8 @@ int timer_init(void) __raw_writel(GPTCR_SWR, &cur_gpt->control); /* We have no udelay by now */ - __raw_writel(0, &cur_gpt->control); + for (i = 0; i < 100; i++) + __raw_writel(0, &cur_gpt->control); i = __raw_readl(&cur_gpt->control); i &= ~GPTCR_CLKSOURCE_MASK; @@ -87,7 +86,7 @@ int timer_init(void) * Enable bit and prescaler */ if (is_mx6sdl() || is_mx6sx() || is_mx6ul() || is_mx6ull() || - is_mx6sll()) { + is_mx6sll() || is_mx7()) { i |= GPTCR_24MEN; /* Produce 3Mhz clock */ @@ -103,6 +102,9 @@ int timer_init(void) #endif __raw_writel(i, &cur_gpt->control); + gd->arch.tbl = __raw_readl(&cur_gpt->counter); + gd->arch.tbu = 0; + return 0; } |