diff options
| author | David Huang <d-huang@ti.com> | 2022-01-25 20:56:31 +0530 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-02-08 09:41:26 -0500 |
| commit | 681023aba4ceb4cb51bcbdc50c41afe8841c2628 (patch) | |
| tree | 2bb2b57348f91bda404f469eaf4b20f3afd95751 /arch/arm/mach-k3/include/mach/j721s2_spl.h | |
| parent | a48fc5cc6f380c048b1edeea548b81dd13ca7320 (diff) | |
arm: K3: Add basic support for J721S2 SoC definition
Add basic support for J721S2 SoC definition
Signed-off-by: David Huang <d-huang@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Diffstat (limited to 'arch/arm/mach-k3/include/mach/j721s2_spl.h')
| -rw-r--r-- | arch/arm/mach-k3/include/mach/j721s2_spl.h | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/arch/arm/mach-k3/include/mach/j721s2_spl.h b/arch/arm/mach-k3/include/mach/j721s2_spl.h new file mode 100644 index 00000000000..94b6c1337f7 --- /dev/null +++ b/arch/arm/mach-k3/include/mach/j721s2_spl.h @@ -0,0 +1,46 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/ + * David Huang <d-huang@ti.com> + */ +#ifndef _ASM_ARCH_J721S2_SPL_H_ +#define _ASM_ARCH_J721S2_SPL_H_ + +/* With BootMode B = 0 */ +#include <linux/bitops.h> +#define BOOT_DEVICE_HYPERFLASH 0x00 +#define BOOT_DEVICE_OSPI 0x01 +#define BOOT_DEVICE_QSPI 0x02 +#define BOOT_DEVICE_SPI 0x03 +#define BOOT_DEVICE_ETHERNET 0x04 +#define BOOT_DEVICE_I2C 0x06 +#define BOOT_DEVICE_UART 0x07 +#define BOOT_DEVICE_NOR BOOT_DEVICE_HYPERFLASH + +/* With BootMode B = 1 */ +#define BOOT_DEVICE_MMC2 0x10 +#define BOOT_DEVICE_MMC1 0x11 +#define BOOT_DEVICE_DFU 0x12 +#define BOOT_DEVICE_UFS 0x13 +#define BOOT_DEVIE_GPMC 0x14 +#define BOOT_DEVICE_PCIE 0x15 +#define BOOT_DEVICE_XSPI 0x16 +#define BOOT_DEVICE_RAM 0x17 +#define BOOT_DEVICE_MMC2_2 0xFF /* Invalid value */ + +/* Backup boot modes with MCU Only = 0 */ +#define BACKUP_BOOT_DEVICE_RAM 0x0 +#define BACKUP_BOOT_DEVICE_USB 0x1 +#define BACKUP_BOOT_DEVICE_UART 0x3 +#define BACKUP_BOOT_DEVICE_ETHERNET 0x4 +#define BACKUP_BOOT_DEVICE_MMC2 0x5 +#define BACKUP_BOOT_DEVICE_SPI 0x6 +#define BACKUP_BOOT_DEVICE_I2C 0x7 + +#define BOOT_MODE_B_SHIFT 4 +#define BOOT_MODE_B_MASK BIT(4) + +#define K3_PRIMARY_BOOTMODE 0x0 +#define K3_BACKUP_BOOTMODE 0x1 + +#endif |