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authorTom Rini <trini@konsulko.com>2020-01-16 09:40:09 -0500
committerTom Rini <trini@konsulko.com>2020-01-16 09:40:09 -0500
commitf47704d4ae494ebc8a25c95202e548ea32f98955 (patch)
tree1fe12b692cf15f97aafb17ab4261e8d8106a797a /arch/arm/mach-mediatek/mt7622/init.c
parent9d5d74c3ccdc78bac969d25e98eab96872e33b5c (diff)
parent7b2e07ad34170c82a098b47a756311dec5e8e04a (diff)
Merge branch '2020-01-15-master-imports'
- MediaTek improvements - Some generic clk improvements - A few assorted bugfixes
Diffstat (limited to 'arch/arm/mach-mediatek/mt7622/init.c')
-rw-r--r--arch/arm/mach-mediatek/mt7622/init.c51
1 files changed, 51 insertions, 0 deletions
diff --git a/arch/arm/mach-mediatek/mt7622/init.c b/arch/arm/mach-mediatek/mt7622/init.c
new file mode 100644
index 00000000000..1e527c0485e
--- /dev/null
+++ b/arch/arm/mach-mediatek/mt7622/init.c
@@ -0,0 +1,51 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 MediaTek Inc.
+ * Author: Sam Shih <sam.shih@mediatek.com>
+ */
+
+#include <common.h>
+#include <fdtdec.h>
+#include <asm/armv8/mmu.h>
+
+int print_cpuinfo(void)
+{
+ printf("CPU: MediaTek MT7622\n");
+ return 0;
+}
+
+int dram_init(void)
+{
+ int ret;
+
+ ret = fdtdec_setup_memory_banksize();
+ if (ret)
+ return ret;
+ return fdtdec_setup_mem_size_base();
+
+}
+
+void reset_cpu(ulong addr)
+{
+ psci_system_reset();
+}
+
+static struct mm_region mt7622_mem_map[] = {
+ {
+ /* DDR */
+ .virt = 0x40000000UL,
+ .phys = 0x40000000UL,
+ .size = 0x40000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE,
+ }, {
+ .virt = 0x00000000UL,
+ .phys = 0x00000000UL,
+ .size = 0x40000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ }, {
+ 0,
+ }
+};
+struct mm_region *mem_map = mt7622_mem_map;