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authorTom Rini <trini@konsulko.com>2020-02-01 15:31:04 -0500
committerTom Rini <trini@konsulko.com>2020-02-01 15:31:04 -0500
commit427da6f0280ba1ce07e06941dd18a435fabd18fb (patch)
tree9375e0449d817471c3dc81e6507ec13bd04798d2 /arch/arm/mach-rockchip/cpu-info.c
parent80e99adbe47d1c8590f9b971ac52257fdc51a5ec (diff)
parentc8343e93220a487f332441cff780a702ca2ce3a9 (diff)
Merge tag 'u-boot-rockchip-20200130' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- Support redundant boot for rk3399 - Support binman for rockchip platform - Update ram driver and add ddr4 support for rk3328
Diffstat (limited to 'arch/arm/mach-rockchip/cpu-info.c')
-rw-r--r--arch/arm/mach-rockchip/cpu-info.c65
1 files changed, 65 insertions, 0 deletions
diff --git a/arch/arm/mach-rockchip/cpu-info.c b/arch/arm/mach-rockchip/cpu-info.c
new file mode 100644
index 00000000000..4b0e99299a0
--- /dev/null
+++ b/arch/arm/mach-rockchip/cpu-info.c
@@ -0,0 +1,65 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * (C) Copyright 2019 Amarula Solutions(India)
+ * Author: Jagan Teki <jagan@amarulasolutions.com>
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch-rockchip/clock.h>
+#include <asm/arch-rockchip/cru.h>
+#include <asm/arch-rockchip/hardware.h>
+#include <linux/err.h>
+
+static char *get_reset_cause(void)
+{
+ struct rockchip_cru *cru = rockchip_get_cru();
+ char *cause = NULL;
+
+ if (IS_ERR(cru))
+ return cause;
+
+ switch (cru->glb_rst_st) {
+ case GLB_POR_RST:
+ cause = "POR";
+ break;
+ case FST_GLB_RST_ST:
+ case SND_GLB_RST_ST:
+ cause = "RST";
+ break;
+ case FST_GLB_TSADC_RST_ST:
+ case SND_GLB_TSADC_RST_ST:
+ cause = "THERMAL";
+ break;
+ case FST_GLB_WDT_RST_ST:
+ case SND_GLB_WDT_RST_ST:
+ cause = "WDOG";
+ break;
+ default:
+ cause = "unknown reset";
+ }
+
+ /**
+ * reset_reason env is used by rk3288, due to special use case
+ * to figure it the boot behavior. so keep this as it is.
+ */
+ env_set("reset_reason", cause);
+
+ /*
+ * Clear glb_rst_st, so we can determine the last reset cause
+ * for following resets.
+ */
+ rk_clrreg(&cru->glb_rst_st, GLB_RST_ST_MASK);
+
+ return cause;
+}
+
+int print_cpuinfo(void)
+{
+ printf("SoC: Rockchip %s\n", CONFIG_SYS_SOC);
+ printf("Reset cause: %s\n", get_reset_cause());
+
+ /* TODO print operating temparature and clock */
+
+ return 0;
+}