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authorTom Rini <trini@konsulko.com>2025-02-25 08:25:00 -0600
committerTom Rini <trini@konsulko.com>2025-02-25 10:54:05 -0600
commit4da90796ca8bde2171cdd5bb7d1293b1edbccab6 (patch)
tree237b788e27beb6337b87113510a47e34fb85e686 /arch/arm/mach-socfpga/board.c
parent3ecda19009ebbe46a64b0629f8b64173c7a551c0 (diff)
parent7965e52e32b0acd561c09f12c4aac1d075c16622 (diff)
Merge tag 'u-boot-socfpga-next-20250225' of https://source.denx.de/u-boot/custodians/u-boot-socfpga into next
CI: https://source.denx.de/u-boot/custodians/u-boot-socfpga/-/pipelines/24816 Please pull the SoCFPGA changes for next from u-boot-socfpga, containing boot support for the Altera SoCFPGA Agilex 5 platform in U-Boot. The changes include: 1. Board-specific configurations and setup required to enable Agilex 5 operation in U-Boot. 2. Integration of cache coherency unit (CCU) initialization routine, including CCU conguration in DT. 3. Clock, firewall (configured in DT), SMMU, low level initialization specific to Agilex 5. 4. Integration of memory initialization routine, including DDR setup. This patch set has been tested on Agilex 5 devkit with QSPI boot (UBI/UBIFS) and RAM boot (TFTP & ARM DS debugger).
Diffstat (limited to 'arch/arm/mach-socfpga/board.c')
-rw-r--r--arch/arm/mach-socfpga/board.c33
1 files changed, 23 insertions, 10 deletions
diff --git a/arch/arm/mach-socfpga/board.c b/arch/arm/mach-socfpga/board.c
index 24a15f7903f..27072e53135 100644
--- a/arch/arm/mach-socfpga/board.c
+++ b/arch/arm/mach-socfpga/board.c
@@ -6,22 +6,24 @@
*/
#include <config.h>
-#include <asm/arch/clock_manager.h>
-#include <asm/arch/mailbox_s10.h>
-#include <asm/arch/misc.h>
-#include <asm/arch/reset_manager.h>
-#include <asm/arch/secure_vab.h>
-#include <asm/arch/smc_api.h>
-#include <asm/global_data.h>
-#include <asm/io.h>
#include <errno.h>
#include <fdtdec.h>
+#include <log.h>
+#include <init.h>
#include <hang.h>
+#include <handoff.h>
#include <image.h>
-#include <init.h>
-#include <log.h>
#include <usb.h>
#include <usb/dwc2_udc.h>
+#include <asm/global_data.h>
+#include <asm/io.h>
+#include <asm/arch/clock_manager.h>
+#include <asm/arch/mailbox_s10.h>
+#include <asm/arch/misc.h>
+#include <asm/arch/reset_manager.h>
+#include <asm/arch/secure_vab.h>
+#include <asm/arch/smc_api.h>
+#include <bloblist.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -57,7 +59,18 @@ int board_init(void)
int dram_init_banksize(void)
{
+#if CONFIG_IS_ENABLED(HANDOFF) && IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX5)
+#ifndef CONFIG_SPL_BUILD
+ struct spl_handoff *ho;
+
+ ho = bloblist_find(BLOBLISTT_U_BOOT_SPL_HANDOFF, sizeof(*ho));
+ if (!ho)
+ return log_msg_ret("Missing SPL hand-off info", -ENOENT);
+ handoff_load_dram_banks(ho);
+#endif
+#else
fdtdec_setup_memory_banksize();
+#endif /* HANDOFF && CONFIG_TARGET_SOCFPGA_AGILEX5 */
return 0;
}