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| author | Tom Rini <trini@konsulko.com> | 2021-08-25 07:48:06 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2021-08-25 08:23:42 -0400 |
| commit | 7bfa565453ec5f63668a3464da21629055c3053f (patch) | |
| tree | 8cb976f3d61707fb80110dfb2449e337db0a6e6c /arch/arm/mach-socfpga/include/mach/firewall.h | |
| parent | 4865db07169126ca0205f1a6265adf01bd69b3df (diff) | |
| parent | 31b51cb1d2b4114085cb5565502d39d6f6daa2a7 (diff) | |
Merge branch 'next-socfpga' of https://github.com/tienfong/uboot_mainline
Diffstat (limited to 'arch/arm/mach-socfpga/include/mach/firewall.h')
| -rw-r--r-- | arch/arm/mach-socfpga/include/mach/firewall.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mach-socfpga/include/mach/firewall.h b/arch/arm/mach-socfpga/include/mach/firewall.h index adab65bc968..5cb7f23f8f0 100644 --- a/arch/arm/mach-socfpga/include/mach/firewall.h +++ b/arch/arm/mach-socfpga/include/mach/firewall.h @@ -115,10 +115,16 @@ struct socfpga_firwall_l4_sys { /* Firewall MPU DDR SCR registers */ #define FW_MPU_DDR_SCR_EN 0x00 #define FW_MPU_DDR_SCR_EN_SET 0x04 +#define FW_MPU_DDR_SCR_MPUREGION0ADDR_BASE 0x10 +#define FW_MPU_DDR_SCR_MPUREGION0ADDR_BASEEXT 0x14 #define FW_MPU_DDR_SCR_MPUREGION0ADDR_LIMIT 0x18 #define FW_MPU_DDR_SCR_MPUREGION0ADDR_LIMITEXT 0x1c + +#define FW_MPU_DDR_SCR_NONMPUREGION0ADDR_BASE 0x90 +#define FW_MPU_DDR_SCR_NONMPUREGION0ADDR_BASEEXT 0x94 #define FW_MPU_DDR_SCR_NONMPUREGION0ADDR_LIMIT 0x98 #define FW_MPU_DDR_SCR_NONMPUREGION0ADDR_LIMITEXT 0x9c +#define FW_MPU_DDR_SCR_NONMPUREGION0ADDR_LIMITEXT_FIELD 0xff #define MPUREGION0_ENABLE BIT(0) #define NONMPUREGION0_ENABLE BIT(8) |