diff options
| author | Tom Rini <trini@konsulko.com> | 2025-10-06 13:20:24 -0600 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2025-10-06 13:20:24 -0600 |
| commit | 0eaa4b337336dbbe93395d1f2ccc18937eaafea2 (patch) | |
| tree | c01e661d69181dceca68f56a4849a9bd04608521 /arch/arm/mach-socfpga/include/mach/system_manager_soc64.h | |
| parent | e50b1e8715011def8aff1588081a2649a2c6cd47 (diff) | |
| parent | 4e4a9de31de2a5f395ee25c59e4026422fbcb27e (diff) | |
Merge branch 'next'
Merge the outstanding changes from the 'next' branch to master.
Diffstat (limited to 'arch/arm/mach-socfpga/include/mach/system_manager_soc64.h')
| -rw-r--r-- | arch/arm/mach-socfpga/include/mach/system_manager_soc64.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h b/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h index 054a28d845d..f768a3a55cb 100644 --- a/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h +++ b/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h @@ -33,6 +33,7 @@ void populate_sysmgr_pinmux(void); #define SYSMGR_SOC64_ECC_INTMASK_CLR 0x98 #define SYSMGR_SOC64_ECC_INTMASK_SERR 0x9C #define SYSMGR_SOC64_ECC_INTMASK_DERR 0xA0 +#define SYSMGR_SOC64_USB3_MISC_CTRL_REG0 0x1F0 #define SYSMGR_SOC64_MPFE_CONFIG 0x228 #define SYSMGR_SOC64_BOOT_SCRATCH_POR0 0x258 #define SYSMGR_SOC64_BOOT_SCRATCH_POR1 0x25C @@ -47,6 +48,17 @@ void populate_sysmgr_pinmux(void); #define ALT_SYSMGR_SCRATCH_REG_POR_0_DDR_PROGRESS_MASK BIT(0) #define ALT_SYSMGR_SCRATCH_REG_POR_1_REVA_WORKAROUND_USER_MODE_MASK BIT(0) #define ALT_SYSMGR_SCRATCH_REG_POR_1_REVA_WORKAROUND_MASK BIT(1) + +/* + * Bits for SYSMGR_SOC64_USB3_MISC_CTRL_REG0 + * Bits[14:13] Port Overcurrent + * Bit[12] Reset Pulse Override + */ +#define SYSMGR_SOC64_USB3_MISC_CTRL_REG0_PORT_OVR_CURR GENMASK(14, 13) +#define SYSMGR_SOC64_USB3_MISC_CTRL_REG0_RESET_PUL_OVR BIT(12) +#define SET_USB3_MISC_CTRL_REG0_PORT_RESET_PUL_OVR 1 +/* BIT 1 actually reflects PIPE power present signal */ +#define SET_USB3_MISC_CTRL_REG0_PORT_OVR_CURR_BIT_1 2 #else #define SYSMGR_SOC64_NAND_AXUSER 0x5c #define SYSMGR_SOC64_DMA_L3MASTER 0x74 |