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author | Tom Rini <trini@konsulko.com> | 2022-03-02 13:59:33 -0500 |
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committer | Tom Rini <trini@konsulko.com> | 2022-03-02 13:59:33 -0500 |
commit | 2dfdba4a5a48de33a3cedc908c183b86b6ff7bd5 (patch) | |
tree | da9d57e285034143ed1e9cd4dfc30577792275ad /arch/arm/mach-socfpga/lowlevel_init_soc64.S | |
parent | f861ffa660dc47c4017c220b94d10a64439d46a7 (diff) | |
parent | 5ff4857d3569710c0f1ce1848f1e7486e3a4cfbe (diff) |
Merge branch '2022-03-02-armv8-fixes-and-cleanups' into next
To quote the author:
I was looking into the arm64 boot code lately and stumbled upon some
issues. Also Nishanth brought back memories of a lengthy debug session,
which was caused due to U-Boot keeping SErrors masked. As the resulting
patches are all somewhat related, I gathered this series here to address
those problems.
Patches 1 to 3 address exception handling issues, with the SError
enablement being the most prominent fix here.
Patch 4 cleans up asm/io.h. This was on the list before[1], but was
somehow lost when it was intercepted by a shorter version of itself.
Patches 5 and 6 clean up some unnecessarily complicated AArch64 assembly
code.
Diffstat (limited to 'arch/arm/mach-socfpga/lowlevel_init_soc64.S')
-rw-r--r-- | arch/arm/mach-socfpga/lowlevel_init_soc64.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-socfpga/lowlevel_init_soc64.S b/arch/arm/mach-socfpga/lowlevel_init_soc64.S index 612ea8a0371..875927cc4d9 100644 --- a/arch/arm/mach-socfpga/lowlevel_init_soc64.S +++ b/arch/arm/mach-socfpga/lowlevel_init_soc64.S @@ -38,7 +38,7 @@ slave_wait_atf: #endif #ifdef CONFIG_ARMV8_MULTIENTRY - branch_if_master x0, x1, 2f + branch_if_master x0, 2f /* * Slave should wait for master clearing spin table. |