Merge tag 'u-boot-socfpga-next-20250225' of https://source.denx.de/u-boot/custodians/u-boot-socfpga into next

CI: https://source.denx.de/u-boot/custodians/u-boot-socfpga/-/pipelines/24816

Please pull the SoCFPGA changes for next from u-boot-socfpga, containing
boot support for the  Altera SoCFPGA Agilex 5 platform in U-Boot. The
changes include:

1. Board-specific configurations and setup required to enable Agilex 5
   operation in U-Boot.
2. Integration of cache coherency unit (CCU) initialization routine,
   including CCU conguration in DT.
3. Clock, firewall (configured in DT), SMMU, low level initialization
   specific to Agilex 5.
4. Integration of memory initialization routine, including DDR setup.

This patch set has been tested on Agilex 5 devkit with QSPI boot
(UBI/UBIFS) and RAM boot (TFTP & ARM DS debugger).

1 files changed, 47 insertions, 24 deletions

diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c
index 46f9c82bbb2..97e01140513 100644
--- a/arch/arm/mach-socfpga/misc.c
+++ b/arch/arm/mach-socfpga/misc.c
@@ -1,31 +1,33 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
- *  Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
+ *  Copyright (C) 2012-2025 Altera Corporation <www.altera.com>
  */
 
 #include <config.h>
 #include <command.h>
-#include <cpu_func.h>
-#include <hang.h>
-#include <asm/cache.h>
-#include <init.h>
-#include <asm/global_data.h>
-#include <asm/io.h>
 #include <errno.h>
+#include <init.h>
+#include <handoff.h>
+#include <hang.h>
+#include <watchdog.h>
 #include <fdtdec.h>
 #include <linux/libfdt.h>
-#include <altera.h>
+#include <linux/printk.h>
 #include <miiphy.h>
 #include <netdev.h>
-#include <watchdog.h>
+#include <asm/global_data.h>
+#include <asm/io.h>
+#include <asm/cache.h>
+#include <asm/pl310.h>
 #include <asm/arch/misc.h>
+#include <asm/arch/nic301.h>
 #include <asm/arch/reset_manager.h>
 #include <asm/arch/scan_manager.h>
-#include <asm/arch/system_manager.h>
-#include <asm/arch/nic301.h>
 #include <asm/arch/scu.h>
-#include <asm/pl310.h>
-#include <linux/printk.h>
+#include <asm/arch/system_manager.h>
+#include <altera.h>
+#include <bloblist.h>
+#include <cpu_func.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -51,8 +53,18 @@ struct bsel bsel_str[] = {
 
 int dram_init(void)
 {
+#if CONFIG_IS_ENABLED(HANDOFF) && IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX5)
+	struct spl_handoff *ho;
+
+	ho = bloblist_find(BLOBLISTT_U_BOOT_SPL_HANDOFF, sizeof(*ho));
+	if (!ho)
+		return log_msg_ret("Missing SPL hand-off info", -ENOENT);
+	gd->ram_size = ho->ram_bank[0].size;
+	gd->ram_base = ho->ram_bank[0].start;
+#else
 	if (fdtdec_setup_mem_size_base() != 0)
 		return -EINVAL;
+#endif /* HANDOFF && CONFIG_TARGET_SOCFPGA_AGILEX5 */
 
 	return 0;
 }
@@ -248,21 +260,32 @@ void socfpga_get_managers_addr(void)
 	if (ret)
 		hang();
 
-	ret = socfpga_get_base_addr("altr,sys-mgr", &socfpga_sysmgr_base);
+	if (IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX))
+		ret = socfpga_get_base_addr("intel,agilex-clkmgr",
+					    &socfpga_clkmgr_base);
+	else if (IS_ENABLED(CONFIG_TARGET_SOCFPGA_N5X))
+		ret = socfpga_get_base_addr("intel,n5x-clkmgr",
+					    &socfpga_clkmgr_base);
+	else if (!IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX5))
+		ret = socfpga_get_base_addr("altr,clk-mgr",
+					    &socfpga_clkmgr_base);
+
 	if (ret)
 		hang();
+}
 
-#ifdef CONFIG_TARGET_SOCFPGA_AGILEX
-	ret = socfpga_get_base_addr("intel,agilex-clkmgr",
-				    &socfpga_clkmgr_base);
-#elif IS_ENABLED(CONFIG_TARGET_SOCFPGA_N5X)
-	ret = socfpga_get_base_addr("intel,n5x-clkmgr",
-				    &socfpga_clkmgr_base);
-#else
-	ret = socfpga_get_base_addr("altr,clk-mgr", &socfpga_clkmgr_base);
-#endif
-	if (ret)
+void socfpga_get_sys_mgr_addr(const char *compat)
+{
+	int ret;
+	struct udevice *sysmgr_dev;
+
+	ret = uclass_get_device_by_name(UCLASS_NOP, compat, &sysmgr_dev);
+	if (ret) {
+		printf("Altera system manager init failed: %d\n", ret);
 		hang();
+	} else {
+		socfpga_sysmgr_base = (phys_addr_t)dev_read_addr(sysmgr_dev);
+	}
 }
 
 phys_addr_t socfpga_get_rstmgr_addr(void)