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| author | Stefano Babic <sbabic@denx.de> | 2015-10-23 12:35:42 +0200 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2015-10-23 12:35:42 +0200 |
| commit | a69fdc7787bfa2f27eed74c2ee58c28ce932d502 (patch) | |
| tree | 4731dbe1c7371c0c797641d9e755a93e614ec930 /arch/arm/mach-socfpga/misc.c | |
| parent | 42e550d44bc2335a18065b155cc408f30f0502ef (diff) | |
| parent | 9f13b6d147dc74f2400ce18d9d4005ba53f21fd3 (diff) | |
Merge branch 'master' of git://git.denx.de/u-boot
Diffstat (limited to 'arch/arm/mach-socfpga/misc.c')
| -rw-r--r-- | arch/arm/mach-socfpga/misc.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c index 0940cc5a4ff..bbd31ef7b52 100644 --- a/arch/arm/mach-socfpga/misc.c +++ b/arch/arm/mach-socfpga/misc.c @@ -52,6 +52,18 @@ void enable_caches(void) #endif } +void v7_outer_cache_enable(void) +{ + /* disable the L2 cache */ + writel(0, &pl310->pl310_ctrl); + + /* enable BRESP, instruction and data prefetch, full line of zeroes */ + setbits_le32(&pl310->pl310_aux_ctrl, + L310_AUX_CTRL_DATA_PREFETCH_MASK | + L310_AUX_CTRL_INST_PREFETCH_MASK | + L310_SHARED_ATT_OVERRIDE_ENABLE); +} + /* * DesignWare Ethernet initialization */ |