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| author | Tom Rini <trini@konsulko.com> | 2020-01-08 15:23:49 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2020-01-08 15:23:49 -0500 |
| commit | ce022f2857714e19c6b31a023b8145782ecef5a5 (patch) | |
| tree | c7a3666314cdcb3a2d3ae2a88a579dbf4ebfc3e1 /arch/arm/mach-socfpga/scan_manager.c | |
| parent | 9af51fb3a505f895d64bd1f8a5967bfaa510add4 (diff) | |
| parent | 8097aee3abc3b773aceea01f756a38b34b274e1e (diff) | |
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
Diffstat (limited to 'arch/arm/mach-socfpga/scan_manager.c')
| -rw-r--r-- | arch/arm/mach-socfpga/scan_manager.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/arch/arm/mach-socfpga/scan_manager.c b/arch/arm/mach-socfpga/scan_manager.c index 52175af48b7..f7ee28915ec 100644 --- a/arch/arm/mach-socfpga/scan_manager.c +++ b/arch/arm/mach-socfpga/scan_manager.c @@ -31,8 +31,6 @@ static const struct socfpga_scan_manager *scan_manager_base = (void *)(SOCFPGA_SCANMGR_ADDRESS); static const struct socfpga_freeze_controller *freeze_controller_base = (void *)(SOCFPGA_SYSMGR_ADDRESS + SYSMGR_FRZCTRL_ADDRESS); -static struct socfpga_system_manager *sys_mgr_base = - (struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS; /** * scan_chain_engine_is_idle() - Check if the JTAG scan chain is idle @@ -218,7 +216,7 @@ u32 scan_mgr_get_fpga_id(void) int ret; /* Enable HPS to talk to JTAG in the FPGA through the System Manager */ - writel(0x1, &sys_mgr_base->scanmgrgrp_ctrl); + writel(0x1, socfpga_get_sysmgr_addr() + SYSMGR_GEN5_SCANMGRGRP_CTRL); /* Enable port 7 */ writel(0x80, &scan_manager_base->en); @@ -253,7 +251,7 @@ u32 scan_mgr_get_fpga_id(void) /* Disable all port */ writel(0, &scan_manager_base->en); - writel(0, &sys_mgr_base->scanmgrgrp_ctrl); + writel(0, socfpga_get_sysmgr_addr() + SYSMGR_GEN5_SCANMGRGRP_CTRL); return id; } |