diff options
| author | Vikas Manocha <vikas.manocha@st.com> | 2017-03-27 13:02:45 -0700 | 
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2017-04-08 09:26:51 -0400 | 
| commit | dc11d83a2e4f534242d634f65427e07c6ecf2c6c (patch) | |
| tree | c6697dd4fc177b0605fa49ae0fdebe14cd9313bf /arch/arm/mach-stm32/stm32f7/soc.c | |
| parent | bf4d0495d2abe0bf0f0dc05bd519ce1bc749f5f4 (diff) | |
stm32f7: enable instruction & data cache
It also enables commands for cache enable/disable/status.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
Diffstat (limited to 'arch/arm/mach-stm32/stm32f7/soc.c')
| -rw-r--r-- | arch/arm/mach-stm32/stm32f7/soc.c | 2 | 
1 files changed, 2 insertions, 0 deletions
| diff --git a/arch/arm/mach-stm32/stm32f7/soc.c b/arch/arm/mach-stm32/stm32f7/soc.c index 06af631cc10..6f9704ab788 100644 --- a/arch/arm/mach-stm32/stm32f7/soc.c +++ b/arch/arm/mach-stm32/stm32f7/soc.c @@ -58,6 +58,8 @@ int arch_cpu_init(void)  		 (V7M_MPU_RASR_XN_ENABLE  			 | V7M_MPU_RASR_AP_RW_RW  			 | 0x01 << V7M_MPU_RASR_TEX_SHIFT +			 | 0x01 << V7M_MPU_RASR_B_SHIFT +			 | 0x01 << V7M_MPU_RASR_C_SHIFT  			 | V7M_MPU_RASR_SIZE_8MB  			 | V7M_MPU_RASR_EN)  			 , &V7M_MPU->rasr | 
