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author | Tero Kristo <kristo@kernel.org> | 2021-06-11 11:45:27 +0300 |
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committer | Lokesh Vutla <lokeshvutla@ti.com> | 2021-06-11 16:34:52 +0530 |
commit | bb318d8dc801586b5e587f7f7d508ad54022fb4b (patch) | |
tree | b22347a683c9aff1ebbeacdfd060a8ab33aafc5a /arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c | |
parent | c3ebc56e2dca4a5db1cfc2268c7822504185fd30 (diff) |
arm: dts: k3-j72xx: correct MCU timer1 frequency
MCU timer1 is used as the tick timer for MCU R5 SPL, and the
clock-frequency defined in DT appears to be incorrect at the moment.
Actual clock source for the timer is MCU_SYSCLK0 / 4 which is 250MHz.
Earlier setup of 25MHz went unnoticed, as there was a separate issue
with omap-timer, which caused an error to the clock by a factor of 8
with j7 devices. This problem surfaced once the omap-timer was fixed.
Signed-off-by: Tero Kristo <kristo@kernel.org>
Diffstat (limited to 'arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c')
0 files changed, 0 insertions, 0 deletions