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authorPaweł Anikiel <pan@semihalf.com>2022-06-17 12:47:24 +0200
committerTien Fong Chee <tien.fong.chee@intel.com>2022-07-01 14:57:14 +0800
commit8b1eee3730fc603fcacc5818b71a0e194bc55892 (patch)
tree4def083a94436d9a9f1ed9108836b7792d0fbea8 /arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_serial.c
parentaea0e80a9feff740a6cb6323c67452bc5a752e4d (diff)
socfpga: arria10: Improve bitstream loading speed
Apply some optimizations to speed up bitstream loading (both for full and split periph/core bitstreams): * Change the size of the first fs read, so that all the subsequent reads are aligned to a specific value (called MAX_FIRST_LOAD_SIZE). This value was chosen so that in subsequent reads the fat fs driver doesn't have to allocate a temporary buffer in get_contents (assuming 8KiB clusters). * Change the buffer size to a larger value when reading to ddr (but not too large, because large transfers cause a stack overflow in the dwmmc driver). Signed-off-by: Paweł Anikiel <pan@semihalf.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_serial.c')
0 files changed, 0 insertions, 0 deletions