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authorTom Rini <trini@konsulko.com>2025-07-31 08:45:50 -0600
committerTom Rini <trini@konsulko.com>2025-07-31 10:04:32 -0600
commitf5e968a28e7cdc2c4365f5a382e02f074ee03fac (patch)
tree2f988c7102a977da562c28075e94e875ab5bcb94 /arch/arm/mach-stm32mp/stm32mp1/cpu.c
parenteef444c38994aee9cd3c6e4df5791b5f7209c8d8 (diff)
parente064db5fe77caaddb21a7793f266119ad89dd79a (diff)
Merge tag 'u-boot-stm32-20250731' of https://source.denx.de/u-boot/custodians/u-boot-stm
CI: https://source.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/27236 - Add support for STM32 TIMERS and STM32 PWM on STM32MP25 - Add STM32MP13xx SPL and OpTee-OS start support - Fix header misuse in stm32 reset drivers - Fix STMicroelectronics spelling - Fix clk-stm32h7 wrong macros used in register read - Fix PRE_CON_BUF_ADDR on STM32MP13 - Fix clock identifier passed to struct scmi_clk_parent_set_in - Fix stm32 reset for STM32F4/F7 and H7 - Enable OF_UPSTREAM_BUILD_VENDOR for stm32mp13_defconfig - Add STM32MP23 SoC and stm32mp235f-dk board support
Diffstat (limited to 'arch/arm/mach-stm32mp/stm32mp1/cpu.c')
-rw-r--r--arch/arm/mach-stm32mp/stm32mp1/cpu.c9
1 files changed, 6 insertions, 3 deletions
diff --git a/arch/arm/mach-stm32mp/stm32mp1/cpu.c b/arch/arm/mach-stm32mp/stm32mp1/cpu.c
index 8c09d91de05..e0c6f8ba937 100644
--- a/arch/arm/mach-stm32mp/stm32mp1/cpu.c
+++ b/arch/arm/mach-stm32mp/stm32mp1/cpu.c
@@ -28,7 +28,9 @@
* early TLB into the .data section so that it not get cleared
* with 16kB allignment (see TTBR0_BASE_ADDR_MASK)
*/
+#if (!IS_ENABLED(CONFIG_XPL_BUILD) || !IS_ENABLED(CONFIG_STM32MP13X))
u8 early_tlb[PGTABLE_SIZE] __section(".data") __aligned(0x4000);
+#endif
u32 get_bootmode(void)
{
@@ -95,18 +97,19 @@ void dram_bank_mmu_setup(int bank)
*/
static void early_enable_caches(void)
{
+#if (!IS_ENABLED(CONFIG_XPL_BUILD) || !IS_ENABLED(CONFIG_STM32MP13X))
/* I-cache is already enabled in start.S: cpu_init_cp15 */
-
if (CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
return;
#if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
- gd->arch.tlb_size = PGTABLE_SIZE;
- gd->arch.tlb_addr = (unsigned long)&early_tlb;
+ gd->arch.tlb_size = PGTABLE_SIZE;
+ gd->arch.tlb_addr = (unsigned long)&early_tlb;
#endif
/* enable MMU (default configuration) */
dcache_enable();
+#endif
}
/*