diff options
| author | Tom Rini <trini@konsulko.com> | 2023-11-13 09:07:23 -0500 | 
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2023-11-13 13:35:57 -0500 | 
| commit | be0724601a9dd6aebca04337b1299edd126bbb4e (patch) | |
| tree | d5cd7b5f733e66f5fd2799503cccc98dfafd4c86 /arch/arm/mach-stm32mp/stm32mp2/cpu.c | |
| parent | 3b6db6901ff5babbb9d21f0fca750996e29d85e0 (diff) | |
| parent | 01a701994b0590b6452516a7c67353359d053c94 (diff) | |
Merge tag 'u-boot-stm32-20231113' of https://source.denx.de/u-boot/custodians/u-boot-stm into next
Introduce STM32MP2 SoCs family support
Add STM32MP257F-EV1 board
[trini: Adjust some includes]
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/arm/mach-stm32mp/stm32mp2/cpu.c')
| -rw-r--r-- | arch/arm/mach-stm32mp/stm32mp2/cpu.c | 107 | 
1 files changed, 107 insertions, 0 deletions
| diff --git a/arch/arm/mach-stm32mp/stm32mp2/cpu.c b/arch/arm/mach-stm32mp/stm32mp2/cpu.c new file mode 100644 index 00000000000..f43d1aaf72c --- /dev/null +++ b/arch/arm/mach-stm32mp/stm32mp2/cpu.c @@ -0,0 +1,107 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause +/* + * Copyright (C) 2023, STMicroelectronics - All Rights Reserved + */ + +#define LOG_CATEGORY LOGC_ARCH + +#include <clk.h> +#include <cpu_func.h> +#include <debug_uart.h> +#include <env_internal.h> +#include <init.h> +#include <misc.h> +#include <wdt.h> +#include <asm/io.h> +#include <asm/arch/stm32.h> +#include <asm/arch/sys_proto.h> +#include <asm/system.h> +#include <dm/device.h> +#include <dm/lists.h> +#include <dm/uclass.h> + +/* + * early TLB into the .data section so that it not get cleared + * with 16kB alignment + */ +#define EARLY_TLB_SIZE 0xA000 +u8 early_tlb[EARLY_TLB_SIZE] __section(".data") __aligned(0x4000); + +/* + * initialize the MMU and activate cache in U-Boot pre-reloc stage + * MMU/TLB is updated in enable_caches() for U-Boot after relocation + */ +static void early_enable_caches(void) +{ +	if (CONFIG_IS_ENABLED(SYS_DCACHE_OFF)) +		return; + +	if (!(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))) { +		gd->arch.tlb_size = EARLY_TLB_SIZE; +		gd->arch.tlb_addr = (unsigned long)&early_tlb; +	} +	/* enable MMU (default configuration) */ +	dcache_enable(); +} + +/* + * Early system init + */ +int arch_cpu_init(void) +{ +	icache_enable(); +	early_enable_caches(); + +	return 0; +} + +void enable_caches(void) +{ +	/* deactivate the data cache, early enabled in arch_cpu_init() */ +	dcache_disable(); +	/* +	 * Force the call of setup_all_pgtables() in mmu_setup() by clearing tlb_fillptr +	 * to update the TLB location udpated in board_f.c::reserve_mmu +	 */ +	gd->arch.tlb_fillptr = 0; +	dcache_enable(); +} + +/* used when CONFIG_DISPLAY_CPUINFO is activated */ +int print_cpuinfo(void) +{ +	char name[SOC_NAME_SIZE]; + +	get_soc_name(name); +	printf("CPU: %s\n", name); + +	return 0; +} + +int arch_misc_init(void) +{ +	return 0; +} + +/* + * Force data-section, as .bss will not be valid + * when save_boot_params is invoked. + */ +static uintptr_t nt_fw_dtb __section(".data"); + +uintptr_t get_stm32mp_bl2_dtb(void) +{ +	return nt_fw_dtb; +} + +/* + * Save the FDT address provided by TF-A in r2 at boot time + * This function is called from start.S + */ +void save_boot_params(unsigned long r0, unsigned long r1, unsigned long r2, +		      unsigned long r3) +{ +	nt_fw_dtb = r2; + +	save_boot_params_ret(); +} | 
