ARM: uniphier: rework struct uniphier_board_data

This commit reworks "struct uniphier_board_data" with an array of
DRAM channel data in it.  It will allow further cleanups by means of
"for" statements that iterate over the DDR channels.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

1 files changed, 111 insertions, 65 deletions

diff --git a/arch/arm/mach-uniphier/boards.c b/arch/arm/mach-uniphier/boards.c
index d70c7122062..05b7c7612ea 100644
--- a/arch/arm/mach-uniphier/boards.c
+++ b/arch/arm/mach-uniphier/boards.c
@@ -14,106 +14,152 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3)
 static const struct uniphier_board_data ph1_sld3_data = {
-	.dram_ch0_base	= 0x80000000,
-	.dram_ch0_size	= 0x20000000,
-	.dram_ch0_width	= 32,
-	.dram_ch1_base	= 0xc0000000,
-	.dram_ch1_size	= 0x20000000,
-	.dram_ch1_width	= 16,
-	.dram_ch2_base	= 0xc0000000,
-	.dram_ch2_size	= 0x10000000,
-	.dram_ch2_width	= 16,
-	.dram_freq	= 1600,
+	.dram_freq = 1600,
+	.dram_nr_ch = 3,
+	.dram_ch[0] = {
+		.base = 0x80000000,
+		.size = 0x20000000,
+		.width = 32,
+	},
+	.dram_ch[1] = {
+		.base = 0xc0000000,
+		.size = 0x20000000,
+		.width = 16,
+	},
+	.dram_ch[2] = {
+		.base = 0xc0000000,
+		.size = 0x10000000,
+		.width = 16,
+	},
 };
 #endif
 
 #if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4)
 static const struct uniphier_board_data ph1_ld4_data = {
-	.dram_ch0_base	= 0x80000000,
-	.dram_ch0_size	= 0x10000000,
-	.dram_ch0_width	= 16,
-	.dram_ch1_base	= 0x90000000,
-	.dram_ch1_size	= 0x10000000,
-	.dram_ch1_width	= 16,
-	.dram_freq	= 1600,
+	.dram_freq = 1600,
+	.dram_nr_ch = 2,
+	.dram_ch[0] = {
+		.base = 0x80000000,
+		.size = 0x10000000,
+		.width = 16,
+	},
+	.dram_ch[1] = {
+		.base = 0x90000000,
+		.size = 0x10000000,
+		.width = 16,
+	},
 };
 #endif
 
 #if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4)
 /* 1GB RAM board */
 static const struct uniphier_board_data ph1_pro4_data = {
-	.dram_ch0_base	= 0x80000000,
-	.dram_ch0_size	= 0x20000000,
-	.dram_ch0_width	= 32,
-	.dram_ch1_base	= 0xa0000000,
-	.dram_ch1_size	= 0x20000000,
-	.dram_ch1_width	= 32,
-	.dram_freq	= 1600,
+	.dram_freq = 1600,
+	.dram_nr_ch = 2,
+	.dram_ch[0] = {
+		.base = 0x80000000,
+		.size = 0x20000000,
+		.width = 32,
+	},
+	.dram_ch[1] = {
+		.base = 0xa0000000,
+		.size = 0x20000000,
+		.width = 32,
+	},
 };
 
 /* 2GB RAM board */
 static const struct uniphier_board_data ph1_pro4_2g_data = {
-	.dram_ch0_base	= 0x80000000,
-	.dram_ch0_size	= 0x40000000,
-	.dram_ch0_width	= 32,
-	.dram_ch1_base	= 0xc0000000,
-	.dram_ch1_size	= 0x40000000,
-	.dram_ch1_width	= 32,
-	.dram_freq	= 1600,
+	.dram_freq = 1600,
+	.dram_nr_ch = 2,
+	.dram_ch[0] = {
+		.base = 0x80000000,
+		.size = 0x40000000,
+		.width = 32,
+	},
+	.dram_ch[1] = {
+		.base = 0xc0000000,
+		.size = 0x40000000,
+		.width = 32,
+	},
 };
 #endif
 
 #if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8)
 static const struct uniphier_board_data ph1_sld8_data = {
-	.dram_ch0_base	= 0x80000000,
-	.dram_ch0_size	= 0x10000000,
-	.dram_ch0_width	= 16,
-	.dram_ch1_base	= 0x90000000,
-	.dram_ch1_size	= 0x10000000,
-	.dram_ch1_width	= 16,
-	.dram_freq	= 1333,
+	.dram_freq = 1333,
+	.dram_nr_ch = 2,
+	.dram_ch[0] = {
+		.base = 0x80000000,
+		.size = 0x10000000,
+		.width = 16,
+	},
+	.dram_ch[1] = {
+		.base = 0x90000000,
+		.size = 0x10000000,
+		.width = 16,
+	},
 };
 #endif
 
 #if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO5)
 static const struct uniphier_board_data ph1_pro5_data = {
-	.dram_ch0_base  = 0x80000000,
-	.dram_ch0_size  = 0x20000000,
-	.dram_ch0_width = 32,
-	.dram_ch1_base  = 0xa0000000,
-	.dram_ch1_size  = 0x20000000,
-	.dram_ch1_width = 32,
-	.dram_freq      = 1866,
+	.dram_freq = 1866,
+	.dram_nr_ch = 2,
+	.dram_ch[0] = {
+		.base = 0x80000000,
+		.size = 0x20000000,
+		.width = 32,
+	},
+	.dram_ch[1] = {
+		.base = 0xa0000000,
+		.size = 0x20000000,
+		.width = 32,
+	},
 };
 #endif
 
 #if defined(CONFIG_ARCH_UNIPHIER_PROXSTREAM2)
 static const struct uniphier_board_data proxstream2_data = {
-	.dram_ch0_base  = 0x80000000,
-	.dram_ch0_size  = 0x40000000,
-	.dram_ch0_width = 32,
-	.dram_ch1_base  = 0xc0000000,
-	.dram_ch1_size  = 0x20000000,
-	.dram_ch1_width = 32,
-	.dram_ch2_base  = 0xe0000000,
-	.dram_ch2_size  = 0x20000000,
-	.dram_ch2_width = 16,
-	.dram_freq      = 2133,
+	.dram_freq = 2133,
+	.dram_nr_ch = 3,
+	.dram_ch[0] = {
+		.base = 0x80000000,
+		.size = 0x40000000,
+		.width = 32,
+	},
+	.dram_ch[1] = {
+		.base = 0xc0000000,
+		.size = 0x20000000,
+		.width = 32,
+	},
+	.dram_ch[2] = {
+		.base = 0xe0000000,
+		.size = 0x20000000,
+		.width = 16,
+	},
 };
 #endif
 
 #if defined(CONFIG_ARCH_UNIPHIER_PH1_LD6B)
 static const struct uniphier_board_data ph1_ld6b_data = {
-	.dram_ch0_base  = 0x80000000,
-	.dram_ch0_size  = 0x40000000,
-	.dram_ch0_width = 32,
-	.dram_ch1_base  = 0xc0000000,
-	.dram_ch1_size  = 0x20000000,
-	.dram_ch1_width = 32,
-	.dram_ch2_base  = 0xe0000000,
-	.dram_ch2_size  = 0x20000000,
-	.dram_ch2_width = 16,
-	.dram_freq      = 1866,
+	.dram_freq = 1866,
+	.dram_nr_ch = 3,
+	.dram_ch[0] = {
+		.base = 0x80000000,
+		.size = 0x40000000,
+		.width = 32,
+	},
+	.dram_ch[1] = {
+		.base = 0xc0000000,
+		.size = 0x20000000,
+		.width = 32,
+	},
+	.dram_ch[2] = {
+		.base = 0xe0000000,
+		.size = 0x20000000,
+		.width = 16,
+	},
 };
 #endif