Merge branch '2020-12-07-bootm-and-spl-atf-improvements' into next

- Series to improve "bootm" by allowing variable evaluation within the
  cmdline we would be passing.  This will help with Chrome OS but can be
  useful elsewhere.
- Improve ATF (TF-A) support within SPL.

7 files changed, 88 insertions, 14 deletions

diff --git a/arch/arm/cpu/armv8/cpu-dt.c b/arch/arm/cpu/armv8/cpu-dt.c
index 97d4473a686..61c38b17cbf 100644
--- a/arch/arm/cpu/armv8/cpu-dt.c
+++ b/arch/arm/cpu/armv8/cpu-dt.c
@@ -9,7 +9,7 @@
 #include <asm/system.h>
 #include <asm/armv8/sec_firmware.h>
 
-#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
+#if CONFIG_IS_ENABLED(ARMV8_SEC_FIRMWARE_SUPPORT)
 int psci_update_dt(void *fdt)
 {
 	/*
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
index 6d3391db3b3..598ee2ffa2f 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
@@ -26,7 +26,7 @@
 #endif
 #include <fsl_sec.h>
 #include <asm/arch-fsl-layerscape/soc.h>
-#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
+#if CONFIG_IS_ENABLED(ARMV8_SEC_FIRMWARE_SUPPORT)
 #include <asm/armv8/sec_firmware.h>
 #endif
 #include <asm/arch/speed.h>
@@ -81,7 +81,7 @@ void ft_fixup_cpu(void *blob)
 						    "device_type", "cpu", 4);
 	}
 
-#if defined(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT) && \
+#if CONFIG_IS_ENABLED(ARMV8_SEC_FIRMWARE_SUPPORT) && \
 	defined(CONFIG_SEC_FIRMWARE_ARMV8_PSCI)
 	int node;
 	u32 psci_ver;
@@ -383,7 +383,7 @@ static void fdt_fixup_msi(void *blob)
 }
 #endif
 
-#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
+#if CONFIG_IS_ENABLED(ARMV8_SEC_FIRMWARE_SUPPORT)
 /* Remove JR node used by SEC firmware */
 void fdt_fixup_remove_jr(void *blob)
 {
@@ -488,7 +488,7 @@ void ft_cpu_setup(void *blob, struct bd_info *bd)
 	else {
 		ccsr_sec_t __iomem *sec;
 
-#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
+#if CONFIG_IS_ENABLED(ARMV8_SEC_FIRMWARE_SUPPORT)
 		fdt_fixup_remove_jr(blob);
 		fdt_fixup_kaslr(blob);
 #endif
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
index a519f6ed673..d8803738f10 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
+++ b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
@@ -192,6 +192,7 @@ ENTRY(lowlevel_init)
 #endif
 
 	/* Initialize GIC Secure Bank Status */
+#if !defined(CONFIG_SPL_BUILD)
 #if defined(CONFIG_GICV2) || defined(CONFIG_GICV3)
 	branch_if_slave x0, 1f
 	bl	get_gic_offset
@@ -205,6 +206,7 @@ ENTRY(lowlevel_init)
 	bl	gic_init_secure_percpu
 #endif
 #endif
+#endif
 
 100:
 	branch_if_master x0, x1, 2f
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ppa.c b/arch/arm/cpu/armv8/fsl-layerscape/ppa.c
index 1ddb267093c..2285296ea00 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ppa.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ppa.c
@@ -16,7 +16,7 @@
 #elif defined(CONFIG_FSL_LSCH2)
 #include <asm/arch/immap_lsch2.h>
 #endif
-#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
+#if CONFIG_IS_ENABLED(ARMV8_SEC_FIRMWARE_SUPPORT)
 #include <asm/armv8/sec_firmware.h>
 #endif
 #ifdef CONFIG_CHAIN_OF_TRUST
diff --git a/arch/arm/dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi b/arch/arm/dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi
index 2375549c6ed..65d5684973d 100644
--- a/arch/arm/dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi
@@ -16,7 +16,7 @@
 		ethernet3 = &enetc6;
 	};
 
-	binman {
+	binman: binman {
 		filename = "u-boot.rom";
 		pad-byte = <0xff>;
 
@@ -80,21 +80,18 @@
 				conf-1 {
 					description = "fsl-ls1028a-kontron-sl28";
 					firmware = "uboot";
-					loadables = "uboot";
 					fdt = "fdt-1";
 				};
 
 				conf-2 {
 					description = "fsl-ls1028a-kontron-sl28-var3";
 					firmware = "uboot";
-					loadables = "uboot";
 					fdt = "fdt-2";
 				};
 
 				conf-3 {
 					description = "fsl-ls1028a-kontron-sl28-var4";
 					firmware = "uboot";
-					loadables = "uboot";
 					fdt = "fdt-3";
 				};
 			};
@@ -102,6 +99,81 @@
 	};
 };
 
+#ifdef CONFIG_SL28_SPL_LOADS_ATF_BL31
+&binman {
+	fit {
+		images {
+			bl31 {
+				description = "ARM Trusted Firmware (bl31)";
+				type = "firmware";
+				arch = "arm";
+				os = "arm-trusted-firmware";
+				compression = "none";
+				load = <CONFIG_SL28_BL31_ENTRY_ADDR>;
+				entry = <CONFIG_SL28_BL31_ENTRY_ADDR>;
+
+				blob-ext {
+					filename = "bl31.bin";
+				};
+			};
+		};
+
+		configurations {
+			conf-1 {
+				firmware = "bl31";
+				loadables = "uboot";
+			};
+
+			conf-2 {
+				firmware = "bl31";
+				loadables = "uboot";
+			};
+
+			conf-3 {
+				firmware = "bl31";
+				loadables = "uboot";
+			};
+		};
+	};
+};
+#endif
+
+#ifdef CONFIG_SL28_SPL_LOADS_OPTEE_BL32
+&binman {
+	fit {
+		images {
+			bl32 {
+				description = "OP-TEE Trusted OS (bl32)";
+				type = "firmware";
+				arch = "arm";
+				os = "tee";
+				compression = "none";
+				load = <CONFIG_SL28_BL32_ENTRY_ADDR>;
+				entry = <CONFIG_SL28_BL32_ENTRY_ADDR>;
+
+				blob-ext {
+					filename = "tee.bin";
+				};
+			};
+		};
+
+		configurations {
+			conf-1 {
+				loadables = "uboot", "bl32";
+			};
+
+			conf-2 {
+				loadables = "uboot", "bl32";
+			};
+
+			conf-3 {
+				loadables = "uboot", "bl32";
+			};
+		};
+	};
+};
+#endif
+
 &i2c0 {
 	rtc: rtc@32 {
 	};
diff --git a/arch/arm/lib/bootm-fdt.c b/arch/arm/lib/bootm-fdt.c
index 02a49a8e10f..fe46a7d7c98 100644
--- a/arch/arm/lib/bootm-fdt.c
+++ b/arch/arm/lib/bootm-fdt.c
@@ -63,7 +63,7 @@ int arch_fixup_fdt(void *blob)
 #endif
 
 #if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV8_PSCI) || \
-	defined(CONFIG_SEC_FIRMWARE_ARMV8_PSCI)
+	CONFIG_IS_ENABLED(SEC_FIRMWARE_ARMV8_PSCI)
 	ret = psci_update_dt(blob);
 	if (ret)
 		return ret;
diff --git a/arch/arm/lib/psci-dt.c b/arch/arm/lib/psci-dt.c
index 0ed29a43f10..903b3357048 100644
--- a/arch/arm/lib/psci-dt.c
+++ b/arch/arm/lib/psci-dt.c
@@ -10,7 +10,7 @@
 #include <linux/sizes.h>
 #include <linux/kernel.h>
 #include <asm/psci.h>
-#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
+#if CONFIG_IS_ENABLED(ARMV8_SEC_FIRMWARE_SUPPORT)
 #include <asm/armv8/sec_firmware.h>
 #endif
 
@@ -64,7 +64,7 @@ int fdt_psci(void *fdt)
 		return nodeoff;
 
 init_psci_node:
-#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
+#if CONFIG_IS_ENABLED(ARMV8_SEC_FIRMWARE_SUPPORT)
 	psci_ver = sec_firmware_support_psci_version();
 #elif defined(CONFIG_ARMV7_PSCI_1_0) || defined(CONFIG_ARMV8_PSCI)
 	psci_ver = ARM_PSCI_VER_1_0;
@@ -85,7 +85,7 @@ init_psci_node:
 			return tmp;
 	}
 
-#ifndef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
+#if !CONFIG_IS_ENABLED(ARMV8_SEC_FIRMWARE_SUPPORT)
 	/*
 	 * The Secure firmware framework isn't able to support PSCI version 0.1.
 	 */