diff options
| author | Tom Rini <trini@konsulko.com> | 2023-01-20 14:21:38 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2023-01-20 14:21:38 -0500 |
| commit | 0b9b01517f0b1398ec27dbb47faf3645b719e02c (patch) | |
| tree | fac11441ba4056e75d3b59811da3b0a91d1cfcf5 /arch/m68k/cpu/mcf52x2/interrupts.c | |
| parent | 8bd3c0a7e17ee17c771cabc0e548a1a436ac021d (diff) | |
| parent | 6333acb961b6fcaa60c6e5b623d676b332481cfa (diff) | |
Merge branch '2023-01-20-finish-CONFIG-migration-work'
- Merge in the final batch of CONFIG to Kconfig/CFG migration work. This
includes a fix for a number of ns16550 or similar UARTs due to a
migration bug. We also pull in a revert for enabling CONFIG_VIDEO on
tools-only_defconfig.
Diffstat (limited to 'arch/m68k/cpu/mcf52x2/interrupts.c')
| -rw-r--r-- | arch/m68k/cpu/mcf52x2/interrupts.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/m68k/cpu/mcf52x2/interrupts.c b/arch/m68k/cpu/mcf52x2/interrupts.c index 35ed1e7901b..e8a1e132d27 100644 --- a/arch/m68k/cpu/mcf52x2/interrupts.c +++ b/arch/m68k/cpu/mcf52x2/interrupts.c @@ -37,10 +37,10 @@ int interrupt_init(void) #if defined(CONFIG_MCFTMR) void dtimer_intr_setup(void) { - intctrl_t *intp = (intctrl_t *) (CONFIG_SYS_INTR_BASE); + intctrl_t *intp = (intctrl_t *) (CFG_SYS_INTR_BASE); clrbits_be32(&intp->int_icr1, INT_ICR1_TMR3MASK); - setbits_be32(&intp->int_icr1, CONFIG_SYS_TMRINTR_PRI); + setbits_be32(&intp->int_icr1, CFG_SYS_TMRINTR_PRI); } #endif /* CONFIG_MCFTMR */ #endif /* CONFIG_M5272 */ @@ -49,7 +49,7 @@ void dtimer_intr_setup(void) defined(CONFIG_M5271) || defined(CONFIG_M5275) int interrupt_init(void) { - int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE); + int0_t *intp = (int0_t *) (CFG_SYS_INTR_BASE); /* Make sure all interrupts are disabled */ #if defined(CONFIG_M5208) @@ -66,11 +66,11 @@ int interrupt_init(void) #if defined(CONFIG_MCFTMR) void dtimer_intr_setup(void) { - int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE); + int0_t *intp = (int0_t *) (CFG_SYS_INTR_BASE); - out_8(&intp->icr0[CONFIG_SYS_TMRINTR_NO], CONFIG_SYS_TMRINTR_PRI); + out_8(&intp->icr0[CFG_SYS_TMRINTR_NO], CFG_SYS_TMRINTR_PRI); clrbits_be32(&intp->imrl0, 0x00000001); - clrbits_be32(&intp->imrl0, CONFIG_SYS_TMRINTR_MASK); + clrbits_be32(&intp->imrl0, CFG_SYS_TMRINTR_MASK); } #endif /* CONFIG_MCFTMR */ #endif /* CONFIG_M5282 | CONFIG_M5271 | CONFIG_M5275 */ @@ -87,7 +87,7 @@ int interrupt_init(void) void dtimer_intr_setup(void) { mbar_writeLong(MCFSIM_IMR, mbar_readLong(MCFSIM_IMR) & ~0x00000400); - mbar_writeByte(MCFSIM_TIMER2ICR, CONFIG_SYS_TMRINTR_PRI); + mbar_writeByte(MCFSIM_TIMER2ICR, CFG_SYS_TMRINTR_PRI); } #endif /* CONFIG_MCFTMR */ #endif /* CONFIG_M5249 || CONFIG_M5253 */ |