diff options
| author | Weijie Gao <weijie.gao@mediatek.com> | 2020-11-12 16:36:57 +0800 |
|---|---|---|
| committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2021-01-24 21:39:27 +0100 |
| commit | f875a1257800b5f60d8e8138a649a54ebfa3c5cf (patch) | |
| tree | 9ec17cc8adf5709148cfdec63d4ca5f35f92eb51 /arch/mips/mach-mtmips/ddr_init.c | |
| parent | 17ade70b6a65a4c83d698b6a6c7b33f45a4382a0 (diff) | |
mmc: mtk-sd: fix sclk cycles shift value
It turns out that the sclk cycles used by mt7620/mt7628 is the same as
other chips (20 bits, 1048576), not 65536.
This patch removes sclk_cycle_shift from dev_comp, and uses a macro with
a value 20 instead.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Diffstat (limited to 'arch/mips/mach-mtmips/ddr_init.c')
0 files changed, 0 insertions, 0 deletions