summaryrefslogtreecommitdiff
path: root/arch/riscv/dts/sg2002-licheerv-nano-b.dts
diff options
context:
space:
mode:
authorThomas Bonnefille <thomas.bonnefille@bootlin.com>2024-11-12 15:57:37 +0100
committerLeo Yu-Chi Liang <ycliang@andestech.com>2024-12-18 13:19:15 +0800
commit4897de90c30d569630633241e7a1b80d4848ec21 (patch)
treea418173a989b3a016313193ca00d86eeab77650d /arch/riscv/dts/sg2002-licheerv-nano-b.dts
parent62181bbf71de1e8f3f0004d162952088257964b6 (diff)
riscv: dts: sophgo: add device tree for LicheeRV Nano
Import a slightly modified version of the LicheeRV Nano and SG2002 device trees from the Linux Kernel. The current supported IPs are UART, MMC, Timer, PLIC and CLINT. Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
Diffstat (limited to 'arch/riscv/dts/sg2002-licheerv-nano-b.dts')
-rw-r--r--arch/riscv/dts/sg2002-licheerv-nano-b.dts45
1 files changed, 45 insertions, 0 deletions
diff --git a/arch/riscv/dts/sg2002-licheerv-nano-b.dts b/arch/riscv/dts/sg2002-licheerv-nano-b.dts
new file mode 100644
index 00000000000..9871a75836c
--- /dev/null
+++ b/arch/riscv/dts/sg2002-licheerv-nano-b.dts
@@ -0,0 +1,45 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2024 Thomas Bonnefille <thomas.bonnefille@bootlin.com>
+ */
+
+/dts-v1/;
+
+#include "sg2002.dtsi"
+
+/ {
+ model = "LicheeRV Nano B";
+ compatible = "sipeed,licheerv-nano-b", "sipeed,licheerv-nano", "sophgo,sg2002";
+
+ aliases {
+ gpio0 = &gpio0;
+ gpio1 = &gpio1;
+ gpio2 = &gpio2;
+ gpio3 = &gpio3;
+ serial0 = &uart0;
+ serial1 = &uart1;
+ serial2 = &uart2;
+ serial3 = &uart3;
+ serial4 = &uart4;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+&osc {
+ clock-frequency = <25000000>;
+};
+
+&sdhci0 {
+ status = "okay";
+ bus-width = <4>;
+ no-1-8-v;
+ no-mmc;
+ no-sdio;
+};
+
+&uart0 {
+ status = "okay";
+};