diff options
| author | Tom Rini <trini@konsulko.com> | 2019-04-08 22:32:11 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2019-04-08 22:32:11 -0400 |
| commit | ffb269ab30dbce8ab87d09942e2a6951694516f1 (patch) | |
| tree | 9dd752a4a6331f7b2c5d920294a0b31b06aea8c3 /arch/riscv/include/asm/syscon.h | |
| parent | 3c99166441bf3ea325af2da83cfe65430b49c066 (diff) | |
| parent | 48b90d9db5d32e587901c4f33175488dd20fe0a5 (diff) | |
Merge git://git.denx.de/u-boot-riscv
- RISC-V arch support SMP.
- Support Andestech's PLIC and PLMT.
- qemu, fu54e, ae350 boards enable SMP by default.
- Fix CONFIG_DEFAULT_DEVICE_TREE failure.
Diffstat (limited to 'arch/riscv/include/asm/syscon.h')
| -rw-r--r-- | arch/riscv/include/asm/syscon.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/riscv/include/asm/syscon.h b/arch/riscv/include/asm/syscon.h index d311ee6b45f..26a008ca599 100644 --- a/arch/riscv/include/asm/syscon.h +++ b/arch/riscv/include/asm/syscon.h @@ -8,12 +8,12 @@ /* * System controllers in a RISC-V system - * - * So far only SiFive's Core Local Interruptor (CLINT) is defined. */ enum { RISCV_NONE, RISCV_SYSCON_CLINT, /* Core Local Interruptor (CLINT) */ + RISCV_SYSCON_PLIC, /* Platform Level Interrupt Controller (PLIC) */ + RISCV_SYSCON_PLMT, /* Platform Level Machine Timer (PLMT) */ }; #endif /* _ASM_SYSCON_H */ |