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author | Tom Rini <trini@konsulko.com> | 2018-03-30 18:16:56 -0400 |
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committer | Tom Rini <trini@konsulko.com> | 2018-03-30 18:16:56 -0400 |
commit | 0ca0a546b186478b9de80cbd27fa8baf17e30863 (patch) | |
tree | da9e58e3cab0a924755bb9be2e809cd18468fc8c /arch/riscv/lib/interrupts.c | |
parent | 2476d26fd307edc84e8257dc1bccefb65547f88a (diff) | |
parent | d58717e42559189a226ea800173147399c8edef9 (diff) |
Merge git://git.denx.de/u-boot-riscv
Diffstat (limited to 'arch/riscv/lib/interrupts.c')
-rw-r--r-- | arch/riscv/lib/interrupts.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/riscv/lib/interrupts.c b/arch/riscv/lib/interrupts.c index 075db8ba464..923f75275bd 100644 --- a/arch/riscv/lib/interrupts.c +++ b/arch/riscv/lib/interrupts.c @@ -63,7 +63,7 @@ __attribute__((weak)) void timer_interrupt(struct pt_regs *regs) static void _exit_trap(int code, uint epc, struct pt_regs *regs) { - static const char *exception_code[] = { + static const char * const exception_code[] = { "Instruction address misaligned", "Instruction access fault", "Illegal instruction", |