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| author | Marek Vasut <marek.vasut+renesas@mailbox.org> | 2024-08-31 22:31:46 +0200 |
|---|---|---|
| committer | Marek Vasut <marek.vasut+renesas@mailbox.org> | 2024-09-09 01:10:33 +0200 |
| commit | c90795076b30c33a95bcaf6d89979543d31fdde1 (patch) | |
| tree | a9704b87128192b84b0b4b4c8c8daf25978f72cc /arch/riscv/lib/interrupts.c | |
| parent | 3fba388e611e27e663c7cb4c1d1483e8909bdbc0 (diff) | |
mtd: spi: renesas: Configure DRDRENR register
Make sure DRDRENR register is configured before performing external
address space read. This register might have been configured by a
prior stage bootloader and leaving it unconfigured would interfere
with U-Boot operation. Since U-Boot RPC SPI driver does not support
DDR data transfer mode yet, set this register unconditionally to 0.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Diffstat (limited to 'arch/riscv/lib/interrupts.c')
0 files changed, 0 insertions, 0 deletions